Combining the ant system algorithm and simulated annealing for 3D/2D fixed-outline floorplanning. - Qi Xu 004; Song Chen 001; Bin Li 025 (Appl. Soft Comput., 2016)

Integer linear programming based fault-tolerant topology synthesis for application-specific NoC. - Zhigang Li; Jinglei Huang; Qi Xu 004; Song Chen 001 (ASICON, 2017)

An Integrated Optimization Framework for Partitioning, Scheduling and Floorplanning on Partially Dynamically Reconfigurable FPGAs. - Xiaodong Xu; Qi Xu 004; Jinglei Huang; Song Chen 001 (ACM Great Lakes Symposium on VLSI, 2017)

Fast thermal analysis for fixed-outline 3D floorplanning. - Qi Xu 004; Song Chen 001 (Integr., 2017)

Clustered Fault Tolerance TSV Planning for 3-D Integrated Circuits. - Qi Xu 004; Song Chen 001; Xiaodong Xu; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC. - Qi Xu 004; Song Chen 001; Bei Yu 001; Feng Wu 001 (ACM Great Lakes Symposium on VLSI, 2018)

Integrated Optimization of Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems. - Song Chen 001; Jinglei Huang; Xiaodong Xu; Qi Xu 004 (CoRR, 2018)

Temperature-Aware Floorplanning for Fixed-Outline 3D ICs. - Tianming Ni; Hao Chang; Shidong Zhu; Lin Lu; Xueyun Li; Qi Xu 004; Huaguo Liang; Zhengfeng Huang (IEEE Access, 2019)

Adaptive 3D-IC TSV Fault Tolerance Structure Generation. - Song Chen 001; Qi Xu 004; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Fault-Tolerant-Driven Clustering for Large Scale Neuromorphic Computing Systems. - Yuting Wu; Bo Ding; Qi Xu 004; Song Chen 001 (AICAS, 2020)

Synthesizing A Generalized Brain-inspired Interconnection Network for Large-scale Network-on-chip Systems. - Mengke Ge; Qi Xu 004; Huajie Ruan; Xiaobing Ni; Song Chen 001; Yi Kang (ACM Great Lakes Symposium on VLSI, 2020)

Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems. - Junpeng Wang 002; Qi Xu 004; Bo Yuan 006; Song Chen 001; Bei Yu 001; Feng Wu 001 (ISCAS, 2020)

Fault tolerance in memristive crossbar-based neuromorphic computing systems. - Qi Xu 004; Song Chen 001; Hao Geng; Bo Yuan 006; Bei Yu 001; Feng Wu 001; Zhengfeng Huang (Integr., 2020)

Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips. - Song Chen 001; Mengke Ge; Zhigang Li; Jinglei Huang; Qi Xu 004; Feng Wu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems. - Song Chen 001; Jinglei Huang; Xiaodong Xu; Bo Ding; Qi Xu 004 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC. - Tianming Ni; Hao Chang; Tai Song; Qi Xu 004; Zhengfeng Huang; Huaguo Liang; Aibin Yan; Xiaoqing Wen (IEEE Trans. Circuits Syst., 2020)

Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC. - Qi Xu 004; Hao Geng; Song Chen 001; Bei Yu 001; Feng Wu 001 (ACM Trans. Design Autom. Electr. Syst., 2020)

Architecture of Cobweb-Based Redundant TSV for Clustered Faults. - Tianming Ni; Dongsheng Liu; Qi Xu 004; Zhengfeng Huang; Huaguo Liang; Aibin Yan (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Reliability-Driven Neuromorphic Computing Systems Design. - Qi Xu 004; Junpeng Wang 002; Hao Geng; Song Chen 001; Xiaoqing Wen (DATE, 2021)

Cross-Layer Dual Modular Redundancy Hardened Scheme of Flip-Flop Design Based on Sense-Amplifier. - Zhengfeng Huang; Zian Su; Tianming Ni; Qi Xu 004; Haochen Qi; Yingchun Lu; Manzi Eric; Hui Xu (J. Circuits Syst. Comput., 2021)

A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC. - Tianming Ni; Qi Xu 004; Zhengfeng Huang; Huaguo Liang; Aibin Yan; Xiaoqing Wen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

PPATuner: pareto-driven tool parameter auto-tuning in physical design via gaussian process transfer learning. - Hao Geng; Qi Xu 004; Tsung-Yi Ho; Bei Yu 001 (DAC, 2022)

Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs. - Bo Ding; Jinglei Huang; Junpeng Wang 002; Qi Xu 004; Song Chen 001; Yi Kang (CoRR, 2022)

High-Speed Adder Design Space Exploration via Graph Neural Processes. - Hao Geng; Yuzhe Ma; Qi Xu 004; Jin Miao; Subhendu Roy; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

GoodFloorplan: Graph Convolutional Network and Reinforcement Learning-Based Floorplanning. - Qi Xu 004; Hao Geng; Song Chen 001; Bo Yuan 006; Cheng Zhuo; Yi Kang; Xiaoqing Wen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure. - Qi Xu 004; Hao Geng; Tianming Ni; Song Chen 001; Bei Yu 001; Yi Kang; Xiaoqing Wen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Cellular Structure-Based Fault-Tolerance TSV Configuration in 3D-IC. - Qi Xu 004; Wenhao Sun; Song Chen 001; Yi Kang; Xiaoqing Wen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Synthesizing Brain-network-inspired Interconnections for Large-scale Network-on-chips. - Mengke Ge; Xiaobing Ni; Qi Xu 004; Song Chen 001; Jinglei Huang; Yi Kang; Feng Wu 001 (ACM Trans. Design Autom. Electr. Syst., 2022)

Mixed-Type Wafer Failure Pattern Recognition. - Hao Geng; Qi Sun 002; Tinghuan Chen; Qi Xu 004; Tsung-Yi Ho; Bei Yu 001 (ASP-DAC, 2023)

NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM. - Junpeng Wang 002; Mengke Ge; Bo Ding; Qi Xu 004; Song Chen 001; Yi Kang (CoRR, 2023)

Reliability-Driven Memristive Crossbar Design in Neuromorphic Computing Systems. - Qi Xu 004; Junpeng Wang 002; Bo Yuan 006; Qi Sun 002; Song Chen 001; Bei Yu 001; Yi Kang; Feng Wu 001 (IEEE Trans Autom. Sci. Eng., 2023)

DDAM: Data Distribution-Aware Mapping of CNNs on Processing-In-Memory Systems. - Junpeng Wang 002; Haitao Du; Bo Ding; Qi Xu 004; Song Chen 001; Yi Kang (ACM Trans. Design Autom. Electr. Syst., 2023)

Memory-aware Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems. - Bo Ding; Jinglei Huang; Qi Xu 004; Junpeng Wang 002; Song Chen 001; Yi Kang (ACM Trans. Design Autom. Electr. Syst., 2023)

Resist: Robust Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems. - Yongtian Bi; Qi Xu 004; Hao Geng; Song Chen 001; Yi Kang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

BusMap: Application Mapping With Bus Routing for Coarse-Grained Reconfigurable Array. - Xiaobing Ni; Mengke Ge; Yongjin Tao; Wendi Sun; Feixiang Duan; Xuefei Bai; Qi Xu 004; Song Chen 001; Yi Kang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Cooperative Multiagent Reinforcement Learning Framework for Droplet Routing in Digital Microfluidic Biochips. - Chen Jiang; Rongquan Yang; Qi Xu 004; Hailong Yao; Tsung-Yi Ho; Bo Yuan 006 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Task Modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems with Heterogeneous Resources. - Bo Ding; Jinglei Huang; Junpeng Wang 002; Qi Xu 004; Song Chen 001; Yi Kang (ACM Trans. Design Autom. Electr. Syst., 2023)

OTPlace-Vias: A Novel Optimal Transport Based Method for High Density Vias Placement in 3D Circuits. - Lin Chen; Qi Xu 004; Hu Ding (DAC, 2024)

Parallel Multi-Objective Bayesian Optimization Framework for CGRA Microarchitecture. - Bing Li; Wendi Sun; Xiaobing Ni; Kaixuan He; Qi Xu 004; Song Chen 001; Yi Kang (DATE, 2024)

Attention-Based EDA Tool Parameter Explorer: From Hybrid Parameters to Multi-QoR metrics. - Donger Luo; Qi Sun 002; Qi Xu 004; Tinghuan Chen; Hao Geng (DATE, 2024)

Miracle: Multi-Action Reinforcement Learning-Based Chip Floorplanning Reasoner. - Bo Yang; Qi Xu 004; Hao Geng; Song Chen 001; Yi Kang (DATE, 2024)

AD2VNCS: Adversarial Defense and Device Variation-tolerance in Memristive Crossbar-based Neuromorphic Computing Systems. - Yongtian Bi; Qi Xu 004; Hao Geng; Song Chen 001; Yi Kang (ACM Trans. Design Autom. Electr. Syst., 2024)

NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators With 3-D Stacked-DRAM. - Junpeng Wang 002; Mengke Ge; Bo Ding; Qi Xu 004; Song Chen 001; Yi Kang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Floorplanning with Edge-aware Graph Attention Network and Hindsight Experience Replay. - Bo Yang; Qi Xu 004; Hao Geng; Song Chen 001; Bei Yu 001; Yi Kang (ACM Trans. Design Autom. Electr. Syst., 2024)

Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits. - Qi Xu 004; Lijie Wang; Jing Wang 131; Lin Cheng 001; Song Chen 001; Yi Kang (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

ThePlace: Thermal-Aware Placement With Operator Learning-Based Ultra-Fast Simulator. - Xinfei Liu; Siting Liu 002; Bei Yu 001; Song Chen 001; Qi Xu 004 (ASP-DAC, 2025)

AIPlace: Analog IC Placement with Multi-Task Learning Framework. - Lijie Wang; Jing Wang 131; Song Chen 001; Qi Xu 004 (ASP-DAC, 2025)

LMM-IR: Large-Scale Netlist-Aware Multimodal Framework for Static IR-Drop Prediction. - Kai Ma; Zhen Wang; Hongquan He; Qi Xu 004; Tinghuan Chen; Hao Geng (DAC, 2025)