Radix-R WHT-FFT with Identical Stage-to-Stage Interconnection Pattern. - Qianjian Xing; Feng Yu 003; Xiaobo Yin; Bei Zhao (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

Pipelined Architecture for a Radix-2 Fast Walsh-Hadamard-Fourier Transform Algorithm. - Jinqi Liu; Qianjian Xing; Xiaobo Yin; Xiubin Mao; Feng Yu 003 (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Modular Serial Pipelined Sorting Architecture for Continuous Variable-Length Sequences with a Very Simple Control Strategy. - Tingting Chen; Weijun Li 001; Feng Yu 003; Qianjian Xing (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

A Novel Memory-Based Radix-2 Fast Walsh-Hadamard-Fourier Transform Architecture. - Qianjian Xing; Zhen-guo Ma; Feng Yu 003 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

A Continuous-Flow Memory-Based Architecture for Real-Valued FFT. - Xiubin Mao; Zhen-guo Ma; Feng Yu 003; Qianjian Xing (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Novel Conflict-Free Parallel Memory Access Scheme for FFT Processors. - Qianjian Xing; Zhen-guo Ma; Yingke Xu (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Fused Continuous Floating-Point MAC on FPGA. - Min Yuan; Qianjian Xing; Zhen-guo Ma; Feng Yu 003; Yingke Xu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018)

HKSiamFC: Visual-Tracking Framework Using Prior Information Provided by Staple and Kalman Filter. - Chenpu Li; Qianjian Xing; Zhenguo Ma (Sensors, 2020)

FPGA-Accelerated Hash Join Operation for Relational Databases. - Meiting Xue; Qianjian Xing; Chen Feng; Feng Yu 003; Zhen-Guo Ma (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

MFCFSiam: A Correlation-Filter-Guided Siamese Network with Multifeature for Visual Tracking. - Chenpu Li; Qianjian Xing; Zhenguo Ma; Ke Zang (Wirel. Commun. Mob. Comput., 2020)

High-Parallelism Hash-Merge Architecture for Accelerating Join Operation on FPGA. - Wen-Qi Wu; Meiting Xue; Qianjian Xing; Feng Yu 003 (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Pipelined Architecture for Interatomic Interactions Computation Considering Atomic Distribution. - Chengyang Han; Jifeng Luo; Yan Pei 004; Qianjian Xing; Feng Yu 003 (IEEE Access, 2025)

Area-Efficient Pipeline Architecture for Serial Real-Valued Fast Fourier Transform. - Kun Li; Hongji Fang; Zhenguo Ma; Feng Yu 003; Bo Zhang 097; Qianjian Xing (IEEE Trans. Very Large Scale Integr. Syst., 2025)