A VLSI architecture for discrete wavelet transform. - Xuyun Chen; Ting Zhou; Qianling Zhang; Wei Li; Hao Min (ICIP (2), 1996)

An algorithm for VLSI implementation of highly efficient cubic-polynomial evaluation. - Fan Mo; Yihua Zhang; Jun Yu; Qianling Zhang (ASP-DAC, 2000)

Iterative solution of ODE-PDE-AE systems for RF circuit simulation. - Omar Wing; Tan Jun; Jinmei Lai; Junyan Ren; Qianling Zhang (ISCAS (4), 2002)

A 500-MHz low-power five-port CMOS register file. - Jiajing Wang; Qianling Zhang (ASP-DAC, 2003)

Periodic steady-state analysis of coupled ODE-AE-CGE systems for MOS RF autonomous circuit simulation. - Xinyu Wu; Zaiman Chen; Jinmei Lai 001; Qianling Zhang; Omar Wing; Junyan Ren (ASP-DAC, 2003)

A high performance QAM receiver for digital cable TV with integrated A/D and FEC decoder. - Bo Shen; Junhua Tian; Zheng Li; Jianing Su; Qianling Zhang (ASP-DAC, 2005)

Joint carrier recovery and adaptive equalization for high-order QAM. - Junhua Tian; Bo Shen; Zheng Li; Jianing Su; Qianling Zhang (ISCAS (2), 2005)

VLSI design of a high-speed RAS crypto-processor with reconfigurable architecture. - Yibo Fan; Xiaoyang Zeng; Zhang Zhang; Jun Chen; Qianling Zhang (ISSPA, 2005)

A modified high-radix scalable Montgomery multiplier. - Yibo Fan; Xiaoyang Zeng; Yu Yu; Gang Wang; Qianling Zhang (ISCAS, 2006)

A Comprehensive Memory Management Framework for CPU-FPGA Heterogenous SoCs. - Zelin Du; Qianling Zhang; Mao Lin; Shiqing Li; Xin Li 137; Lei Ju 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Adaptive Task-Based Intermittent Computing System With Parallel State Backup. - Wei Zhang 173; Qianling Zhang; Mingsong Lv; Songran Liu; Zimeng Zhou; Qiulin Chen; Nan Guan; Lei Ju 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)