Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. - Qianneng Zhou; Fengchang Lai; Mingyan Yu (APCCAS, 2006)

On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. - Qianneng Zhou; Fengchang Lai; Mingyan Yu (ACM Great Lakes Symposium on VLSI, 2006)

On-Chip Voltage Down Converter Based on Moderate Inversion for Low- Power VLSI Chips. - Qianneng Zhou; Fengchang Lai; Yongsheng Wang (VLSI Design, 2007)

Design of Modulation and Packet Detection in Body Area Networks. - Guoquan Li; Ke Tang; Jinzhao Lin; Yu Pang; Zhangyong Li; Qianneng Zhou; Lu Deng (J. Comput., 2014)

A Sub-1V High-PSRR Piecewise-Linear Bandgap Reference. - Qianneng Zhou; Qi Li; Hongjuan Li; Jinzhao Lin; Yu Pang; Guoquan Li; Lu Deng (J. Comput., 2014)

Designing Optimized Imprecise Fixed-Point Arithmetic Circuits Specified by polynomials with Various Constraints. - Yu Pang; Yafeng Yan; Jinzhao Lin; Zhangyong Li; Qianneng Zhou; Wei Wu 002 (J. Circuits Syst. Comput., 2014)

A PPG Signal De-Noising Method Based on the DTCWT and the Morphological Filtering. - Tong Bai; Dan Li; Huiqian Wang; Yu Pang; Guoquan Li; Jinzhao Lin; Qianneng Zhou; Gwanggil Jeon (SITIS, 2016)

High-order curvature-compensated CMOS bandgap voltage reference. - Qianneng Zhou; Feihong Cheng; Hongjuan Li; Kai Yan; Wei Luo (ASICON, 2017)

Hardware Design of Gaussian Kernel Function for Non-Linear SVM Classification. - Yuanfa Wang; Yu Pang; Huan Huang; Qianneng Zhou; Jiasai Luo (ASICON, 2021)

VLSI design of multiclass classification using sparse extreme learning machine for epilepsy and seizure detection. - Yuanfa Wang; Qianneng Zhou; Jiasai Luo; Yi Lu; Huiqian Wang; Yu Pang; Zhiwei Huang (IEICE Electron. Express, 2022)