An Estimation of Low Bound for Two-Dimensional Image Compression Coding. - Huijuan Li; Qingdong Yao; Jae-Ho Choi 002; Hoon-Sung Kwak (ICSC, 1995)

A software/hardware co-design methodology for embedded microprocessor core design. - Yong Zhang; Kai-Kuang Ma; Qingdong Yao (IEEE Trans. Consumer Electron., 1999)

Novel video signal processor with VLIW-controlled SIMD architecture. - Yong Zhang; Kai-Kuang Ma; Qingdong Yao (VCIP, 2000)

SPMD architecture for DSP-based data encryption communication system. - Peng Liu 016; Qiaohai Pan; Dongxiao Li; Qingdong Yao; Weijian Yang (Security and Watermarking of Multimedia Contents, 2001)

Model-based coding for multiobject sequence. - Yunhai Liu; Lu Yu; Qingdong Yao (VCIP, 2001)

A bus arbitration scheme for HDTV decoder SoC. - Dongxiao Li; Qingdong Yao; Peng Liu 016; Li Zhou (APCCAS (2), 2002)

Hardware/software codesign for HDTV source decoder on system level. - Peng Liu 016; Qingdong Yao; Weijian Yang (VCIP, 2002)

Highly efficient simulation environment for HDTV video decoder in VLSI design. - Xun Mao; Wei Wang; Huimin Gong; Yan L. He; Jian Lou; Lu Yu; Qingdong Yao; Peter Pirsch (VCIP, 2002)

Fast algorithm of arbitrary fractional-pixel accuracy motion estimation. - Weidong Wang; Qingdong Yao; Lu Yu (VCIP, 2002)

Embedded software optimization for MP3 decoder implemented on RISC core. - Yingbiao Yao; Qingdong Yao; Peng Liu 016; Zhibin Xiao (IEEE Trans. Consumer Electron., 2004)

A processor for MPEG decoder SOC: a software/hardware co-design approach. - Guojun Yu; Qingdong Yao; Peng Liu 016; Zhidi Jiang; Fuping Li (Electronic Imaging: Image and Video Communications and Processing, 2005)

A NoC Emulation/Verification Framework. - Peng Liu 016; Chunchang Xiang; Xiaohang Wang 001; Bingjie Xia; Yangfan Liu; Weidong Wang; Qingdong Yao (ITNG, 2009)

A networks-on-chip architecture design space exploration - The LIB. - Peng Liu 016; Bingjie Xia; Chunchang Xiang; Xiaohang Wang 001; Weidong Wang; Qingdong Yao (Comput. Electr. Eng., 2009)

A synergetic operating unit on NoC layer for CMP system. - Xiongli Gu; Peng Liu 016; Zhiyuan Xu; Bingjie Xia; Cheng Li; Qingdong Yao; Ce Shi (Int. J. High Perform. Syst. Archit., 2010)

Network interface design based on mutual interface definition. - Bingjie Xia; Kejun Wu; Chunchang Xiang; Mei Yang 001; Peng Liu 016; Qingdong Yao (Int. J. High Perform. Syst. Archit., 2010)

A networks-on-chip emulation/verification framework. - Peng Liu 016; Yangfan Liu; Bingjie Xia; Chunchang Xiang; Xiaohang Wang 001; Kejun Wu; Weidong Wang; Qingdong Yao (Int. J. High Perform. Syst. Archit., 2011)

An efficient scheduler of RTOS for multi/many-core system. - Xiongli Gu; Peng Liu 016; Mei Yang 001; Jie Yang; Cheng Li; Qingdong Yao (Comput. Electr. Eng., 2012)

An efficient protocol with synchronization accelerator for multi-processor embedded systems. - Jiyang Yu; Peng Liu 016; Weidong Wang; Chunming Huang; Jie Yang; Yingtao Jiang; Qingdong Yao (Parallel Comput., 2013)