Wideband LNA with 1.9 dB noise figure in 0.18 µm CMOS for high frequency ultrasound imaging applications. - Yuxuan Tang; Yulang Feng; Zhiheng Zuo; Qingjun Fan; Cheng Fang; Jun Zou; Jinghong Chen (NEWCAS, 2016)

RFI mitigating receiver back-end for radiometers. - Phaneendra Bikkina; Qingjun Fan; Wenlan Wu; Jinghong Chen; Esko Mikkola (IGARSS, 2017)

A 14-bit 2.5 GS/s digital pre-distorted DAC in 65 nm CMOS with SFDR > 70 dB up to 1.2 GHz. - Zhiheng Zuo; Qingjun Fan; Jinghong Chen (ISCAS, 2017)

A 10-bit 400 MS/s asynchronous SAR ADC using dual-DAC architecture for speed enhancement. - Qingjun Fan; Jinghong Chen (MWSCAS, 2017)

A 25-GS/s 4-bit Single-core Flash ADC in 28 nm FDSOI CMOS. - Yulang Feng; Yuxuan Tang; Qingjun Fan; Jinghong Chen (APCCAS, 2018)

A Current Reuse Wideband LNA with Complementary Noise and Distortion Cancellation for Ultrasound Imaging Applications. - Yuxuan Tang; Yulang Feng; Qingjun Fan; Runxi Zhang; Jinghong Chen (APCCAS, 2018)

A 1-GS/s 8-Bit 12.01-fJ/conv.-step Two-Step SAR ADC in 28-nm FDSOI Technology. - Qingjun Fan; Jinghong Chen (ESSCIRC, 2019)

A 2.4 GS/s 10-Bit Time-Interleaved SAR ADC with a Bypass Window and Opportunistic Offset Calibration. - Qingjun Fan; Jinghong Chen (ESSCIRC, 2019)

A 500 MS/s 10-Bit Single-Channel SAR ADC with A Double-Rate Comparator. - Qingjun Fan; Runxi Zhang; Phaneendra Bikkina; Esko Mikkola; Jinghong Chen (ESSCIRC, 2019)

A 500-MS/s 13-Bit SAR-Assisted Time-Interleaved Digital-Slope ADC. - Qingjun Fan; Jinghong Chen (ISCAS, 2019)

A Low-Power SiPM Readout Front-End with Fast Pulse Generation and Successive-Approximation Register ADC in 0.18 μm CMOS. - Yuxuan Tang; Qingjun Fan; Yulang Feng; Hao Deng 003; Runxi Zhang; Jinghong Chen (ISCAS, 2019)

A 6-b 20-GS/s 2-Way Time-Interleaved Flash ADC with Automatic Comparator Offset Calibration in 28-nm FDSOI. - Yulang Feng; Hao Deng 003; Qingjun Fan; Runxi Zhang; Phaneendra Bikkina; Jinghong Chen (ISCAS, 2020)

A Quadrature Frequency Synthesizer with 118.7-fs Jitter, 27.94% Locking Range for Multiband 5G mmW Applications. - Runxi Zhang; Hui Yang; Zitong Zhang; Chunqi Shi; Qingjun Fan; Jinghong Chen (ISCAS, 2020)

An Automatic Comparator Offset Calibration for High-Speed Flash ADCs in FDSOI CMOS Technology. - Yulang Feng; Qingjun Fan; Hao Deng 003; Jeffrey Chen; Runxi Zhang; Phaneendra Bikkina; Jinghong Chen (LASCAS, 2020)

Machine-Learning Based Nonlinerity Correction for Coarse-Fine SAR-TDC Hybrid ADC. - Hao Deng 003; Qingjun Fan; Runxi Zhang; Jinghong Chen (MWSCAS, 2020)

A Time-Interleaved SAR ADC With Bypass-Based Opportunistic Adaptive Calibration. - Qingjun Fan; Yi Hong 003; Jinghong Chen (IEEE J. Solid State Circuits, 2020)

A 5-GS/s 6-Bit 15.07-mW Flash ADC With Partially Active Second-Stage Comparison and 2× Time-Domain Interpolation. - Yulang Feng; Hao Deng 003; Qingjun Fan; Yuxuan Tang; Phaneendra Bikkina; Esko Mikkola; Jinghong Chen (IEEE Trans. Very Large Scale Integr. Syst., 2022)