Logic Verification of Incomplete Functions and Design Error Location. - Qinhai Zhang; Charles Trullemans (CHARME, 1993)

Logic verification and design error diagnosis for combinational circuits. - Qinhai Zhang (1995)

Application of Specific Delay Window Routing for Timing Optimization in FPGA Designs. - Evan Wegley; Qinhai Zhang (FPGA, 2015)

Application of Specific Delay Window Routing for Timing Optimization in FPGA Designs. - Evan Wegley; Yanhua Yi; Qinhai Zhang (ACM Trans. Reconfigurable Technol. Syst., 2016)