Combining Adaptive Filter and Phase Vocoder for Heart Rate Monitoring Using Photoplethysmography During Physical Exercise. - Qingsong Xie; Qirui Zhang 001; Guoxing Wang; Yong Lian 001 (EMBC, 2018)

Motion Artifact Removal for PPG Signals based on Accurate Fundamental Frequency Estimation and Notch Filtering. - Qirui Zhang 001; Qingsong Xie; Min Wang 014 (EMBC, 2018)

Removal of Motion Artifacts in Photoplethysmograph Sensors during Intensive Exercise for Accurate Heart Rate Calculation Based on Frequency Estimation and Notch Filtering. - Min Wang 014; Zhe Li; Qirui Zhang 001; Guoxing Wang (Sensors, 2019)

A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge. - Hyochan An; Siddharth Venkatesan; Sam Schiferl; Tim Wesley; Qirui Zhang 001; Jingcheng Wang; Kyojin Choo; Shiyu Liu; Bowen Liu 001; Ziyun Li; Hengfei Zhong; Luyao Gong; et al. (VLSI Circuits, 2020)

1.03pW/b Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent Edge Processors. - Jingcheng Wang; Hyochan An; Qirui Zhang 001; Hun-Seok Kim; David T. Blaauw; Dennis Sylvester (VLSI Circuits, 2020)

A digital signal processor (DSP)-based system for embedded continuous-time cuffless blood pressure monitoring using single-channel PPG signal. - Qirui Zhang 001; Qingsong Xie; Kefeng Duan; Bo Liang; Min Wang 014; Guoxing Wang (Sci. China Inf. Sci., 2020)

An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks. - Hyochan An; Sam Schiferl; Siddharth Venkatesan; Tim Wesley; Qirui Zhang 001; Jingcheng Wang; Kyojin Choo; Shiyu Liu; Bowen Liu 001; Ziyun Li; Luyao Gong; Hengfei Zhong; et al. (IEEE J. Solid State Circuits, 2021)

A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence. - Qirui Zhang 001; Hyochan An; Zichen Fan; Zhehong Wang; Ziyun Li; Guanru Wang; Hun-Seok Kim; David T. Blaauw; Dennis Sylvester (VLSI Technology and Circuits, 2022)

Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating. - Zichen Fan; Hyochan An; Qirui Zhang 001; Boxun Xu; Li Xu 006; Chien-Wei Tseng; Yimai Peng; Ang Cao; Bowen Liu 001; Changwoo Lee 001; Zhehong Wang; Fanghao Liu; et al. (VLSI Technology and Circuits, 2022)

SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights. - Pierre Abillama; Zichen Fan; Yu Chen 070; Hyochan An; Qirui Zhang 001; Seungkyu Choi; David T. Blaauw; Dennis Sylvester; Hun-Seok Kim (ASAP, 2023)

TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing. - Zichen Fan; Qirui Zhang 001; Pierre Abillama; Sara Shoouri; Changwoo Lee 001; David T. Blaauw; Hun-Seok Kim; Dennis Sylvester (ISCA, 2023)

An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees. - Hyochan An; Yu Chen 070; Zichen Fan; Qirui Zhang 001; Pierre Abillama; Hun-Seok Kim; David T. Blaauw; Dennis Sylvester (ISSCC, 2023)

A $1.5 mu mathrm{W}$ End-to-End Keyword Spotting SoC with Content-Adaptive Frame Sub-Sampling and Fast-Settling Analog Frontend. - Ji-Hwan SeoI; Heejin Yang; Rohit Rothe; Zichen Fan; Qirui Zhang 001; Hun-Seok Kim; David T. Blaauw; Dennis Sylvester (ISSCC, 2023)

Quantum Circuit Simulation with Fast Tensor Decision Diagram. - Qirui Zhang 001; Mehdi Saligane; Hun-Seok Kim; David T. Blaauw; Georgios Tzimpragos; Dennis Sylvester (ISQED, 2024)

A 1.5-μW Fully-Integrated Keyword Spotting SoC in 28-nm CMOS With Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping. - Heejin Yang; Ji-Hwan Seol; Rohit Rothe; Zichen Fan; Qirui Zhang 001; Hun-Seok Kim; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2024)

RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM. - Qirui Zhang 001; Zichen Fan; Hyochan An; Zhehong Wang; Ziyun Li; Guanru Wang; Pierre Abillama; Hun-Seok Kim; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2024)

AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices. - Zichen Fan; Qirui Zhang 001; Hyochan An; Boxun Xu; Li Xu 006; Chien-Wei Tseng; Yimai Peng; Andrea Bejarano-Carbo; Pierre Abillama; Ang Cao; Bowen Liu 001; Changwoo Lee 001; et al. (IEEE J. Solid State Circuits, 2024)

A Crystal-Less Frequency-Modulation Transmitter IC with Joint Neural-Network-Driven Modulation and Coding for Low-Power Connectivity. - Yi Shen; Boxuan Chang; Chien-Wei Tseng; Yunfan Wang; Qirui Zhang 001; Zichen Fan; Zhen Feng; Rahul Narashimha; Andrea Bejarano-Carbo; Hun-Seok Kim; David T. Blaauw (ISSCC, 2025)

One-Hot Multi-Level Leaky Integrate-and-Fire Spiking Neural Networks for Enhanced Accuracy-Latency Tradeoff. - Pierre Abillama; Changwoo Lee 001; Andrea Bejarano-Carbo; Qirui Zhang 001; Dennis Sylvester; David T. Blaauw; Hun-Seok Kim (IEEE Access, 2025)