A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS. - Haoyu Qian; Qiyuan Liu 001; José Silva-Martínez; Sebastian Hoyos (IEEE J. Solid State Circuits, 2016)

A 13bit 200MS/S pipeline ADC with current-mode MDACs. - Carlos Briseno-Vidrios; Dadian Zhou; Suraj Prakash; Qiyuan Liu 001; Alexander Edward; José Silva-Martínez (ISCAS, 2017)

High-performance continuous-time MASH sigma-delta ADCs for broadband wireless applications. - Qiyuan Liu 001; Alexander Edward; Carlos Briseno-Vidrios; Negar Rashidi; José Silva-Martínez (MWSCAS, 2017)

A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. - Alexander Edward; Qiyuan Liu 001; Carlos Briseno-Vidrios; Martin Kinyua; Eric G. Soenen; Aydin Ilker Karsilayan; José Silva-Martínez (IEEE J. Solid State Circuits, 2017)

A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques. - Qiyuan Liu 001; Alexander Edward; Martin Kinyua; Eric G. Soenen; José Silva-Martínez (IEEE J. Solid State Circuits, 2017)

A 2×20W 0.0013% THD+N Class-D audio amplifier with consistent performance up to maximum power level. - Eric Cope; Julian Aschieri; Tony Lai; Franklin Zhao; Walter Grandfield; Michael Clifford; Pete Rathfelder; Qiyuan Liu 001; Siddartha Kavilipati; Aaron Vandergriff; Gerald Miaille (ISSCC, 2018)

A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. - Carlos Briseno-Vidrios; Dadian Zhou; Suraj Prakash; Qiyuan Liu 001; Alexander Edward; Eric G. Soenen; Martin Kinyua; José Silva-Martínez (IEEE J. Solid State Circuits, 2018)

A Continuous-Time MASH 1-1-1 Delta-Sigma Modulator With FIR DAC and Encoder-Embedded Loop-Unrolling Quantizer in 40-nm CMOS. - Qiyuan Liu 001; Alexander Edward; Dadian Zhou; José Silva-Martínez (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. - Dadian Zhou; Carlos Briseno-Vidrios; Junning Jiang; Chulhyun Park; Qiyuan Liu 001; Eric G. Soenen; Martin Kinyua; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator. - Dadian Zhou; Junning Jiang; Qiyuan Liu 001; Eric G. Soenen; Martin Kinyua; José Silva-Martínez (IEEE J. Solid State Circuits, 2020)