Hardware Implementations with High Throughput, Low-Latency and Low-Area for Matrix Inversion. - Sultan Alqahtani; Yiqun Zhu; Qizhi Shi; Xiaolin Meng; Xinhua Wang 001 (FPT, 2020)

A Highly Customizable and Efficient Hardware Implementation for Parallel Matrix Inversion. - Sultan Alqahtani; Yiqun Zhu; Qizhi Shi; Xiaolin Meng; Xinhua Wang 001 (FPT, 2022)