Mitigation Techniques Against TSV-to-TSV Coupling in 3DIC. - Quan Deng 003; Minxuan Zhang; Zhenyu Zhao; Peng Li (NCCET, 2015)

SEU hardened layout design for SRAM cells based on SEU reversal. - Peng Li; Wei Guo; Zhenyu Zhao; Minxuan Zhang; Quan Deng 003 (IEICE Electron. Express, 2015)

A Novel Separated Pre-discharging Sense Amplifier for STT-MRAM. - Huan Li; Zhenyu Zhao; Quan Deng 003; Peng Li; Haoyue Tang; Lianhua Qu (NCCET, 2016)

Mitigate erroneous operations of 2T-2MTJ STT-MRAM based on dynamic voltage threshold. - Haoyue Tang; Zhenyu Zhao; Lianhua Qu; Quan Deng 003; Huan Li; Wei Guo (IEICE Electron. Express, 2016)

Towards warp-scheduler friendly STT-RAM/SRAM hybrid GPGPU register file design. - Quan Deng 003; Youtao Zhang; Minxuan Zhang; Jun Yang 002 (ICCAD, 2017)

DrAcc: a DRAM based accelerator for accurate CNN inference. - Quan Deng 003; Lei Jiang 001; Youtao Zhang; Minxuan Zhang; Jun Yang 002 (DAC, 2018)

LAcc: Exploiting Lookup Table-based Fast and Accurate Vector Multiplication in DRAM-based CNN Accelerator. - Quan Deng 003; Youtao Zhang; Minxuan Zhang; Jun Yang 002 (DAC, 2019)

RFAcc: a 3D ReRAM associative array based random forest accelerator. - Lei Zhao; Quan Deng 003; Youtao Zhang; Jun Yang 002 (ICS, 2019)

PageCmp: Bandwidth Efficient Page Deduplication through In-memory Page Comparison. - Mehrnoosh Raoufi; Quan Deng 003; Youtao Zhang; Jun Yang 002 (ISVLSI, 2019)

DWMAcc: Accelerating Shift-based CNNs with Domain Wall Memories. - Zhengguo Chen; Quan Deng 003; Nong Xiao 001; Kirk Pruhs; Youtao Zhang (ACM Trans. Embed. Comput. Syst., 2019)

FRF: Toward Warp-Scheduler Friendly STT-RAM/SRAM Fine-Grained Hybrid GPGPU Register File Design. - Quan Deng 003; Youtao Zhang; Zhenyu Zhao; Shuzheng Zhang; Minxuan Zhang; Jun Yang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A Memristor-Based Spiking Neural Network With High Scalability and Learning Efficiency. - Zhenyu Zhao; Lianhua Qu; Lei Wang 011; Quan Deng 003; Nan Li; Ziyang Kang; Shasha Guo 001; Weixia Xu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Fast Approximate LUT-based Vector Multiplication in DRAM. - Ziming Chen; Quan Deng 003; Yongwen Wang (ICPADS, 2023)

ImSPU: Implicit Sharing of Computation Resources Between Vector and Scalar Processing Units. - Hongbing Tan; Xiaowei He; Guichu Sun; Liquan Xiao; Yuanhu Cheng; Jing Zhang; Zhong Zheng; Quan Deng 003; Bingcai Sui; Yongwen Wang; Libo Huang 002 (Euro-Par (2), 2024)

A Novel Efficient Maximum Searching Algorithm in ReRAM Array. - Wenqing Wang; Ziming Chen; Quan Deng 003; Liang Fang (Euro-Par Workshops (2), 2024)

SSC: An SRAM-Based Silence Computing Design for On-chip Memory. - Ziming Chen; Quan Deng 003; Yiyue Hu; Xiaowei He; Libo Huang 002; Yongwen Wang (ICA3PP (4), 2024)

PFP: Parallel Floating-Point Vector Multiplication Acceleration in MAGIC ReRAM. - Wenqing Wang; Ziming Chen; Quan Deng 003; Liang Fang (DATE, 2025)

Vector Value Prediction with Element-wise Stride Compression. - Yanmeng Huang; Ling Yang 008; Yuanhu Cheng; Junhui Wang; Quan Deng 003; Junbo Tie; Yongwen Wang; Hai Zhong; Libo Huang 002 (ACM Great Lakes Symposium on VLSI, 2026)