RF performance of Standard, High-Resistivity and Trap-Rich Silicon substrates down to cryogenic temperature. - Quentin Berlingard; M. Moulin; Jean-Philippe Michel; T. Fache; Ismael Charlet; C. Plantier; Z. Chalupa; Jose Lugo-Alvarez; Jean-Pierre Raskin; Louis Hutin; Mikaël Cassé (ESSDERC, 2023)

Noise modeling using look-up tables and DC measurements for cryogenic applications. - Giovani Britton; Salvador Mir; Estelle Lauga-Larroze; Benjamin Dormieu; Quentin Berlingard; Mikaël Cassé; Philippe Galy (VLSI-SoC, 2023)

LUT-Based Design of a Cryogenic Cascode LNA with Simultaneous Noise and Power Matching. - Giovani Britton; Salvador Mir; Estelle Lauga-Larroze; Benjamin Dormieu; Jose Lugo; Joao Azevedo; Sebastien Sadlo; Quentin Berlingard; Mikaël Cassé; Philippe Galy (NewCAS, 2024)

Self-Heating Effects in FDSOI Transistors at Cryogenic Temperature: A Spatial and Temporal Experimental Study (Invited). - Mikaël Cassé; Flávio Enrico Bergamaschi; Quentin Berlingard (IRPS, 2025)

28 nm FD-SOI 4 K RF LNA Design Using DC Transistor Characterization Measurements. - Giovani Britton; Salvador Mir; Estelle Lauga-Larroze; Benjamin Dormieu; Jose Lugo; Joao Azevedo; Sebastien Sadlo; Quentin Berlingard; Mickael Casse; Philippe Galy (LATS, 2025)