An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation. - Thomas Haine; Quoc-Khoi Nguyen; François Stas; Ludovic Moreau; Denis Flandre; David Bol (ESSCIRC, 2017)