Durable Memory RS/6000 System Design. - M. Abbott; David Har; Lorraine Herger; M. Kauffmann; Ken Mak; J. Murdock; Charles O. Schulz; T. Basil Smith; R. Brett Tremaine; D. Yeh; L. Wong (FTCS, 1994)

Reliability-Availability-Serviceability Characteristics of a Compressed-Memory System. - Jim Chen; David Har; Ken Mak; Charles O. Schulz; R. Brett Tremaine; Michael E. Wazlowski (DSN, 2000)

Memory Expansion Technology (MXT): Competitive impact. - T. Basil Smith; Bülent Abali; Dan E. Poff; R. Brett Tremaine (IBM J. Res. Dev., 2001)

IBM Memory Expansion Technology (MXT). - R. Brett Tremaine; Peter A. Franaszek; John T. Robinson; Charles O. Schulz; T. Basil Smith; Michael E. Wazlowski; P. Maurice Bland (IBM J. Res. Dev., 2001)

Pinnacle: IBM MXT in a Memory Controller Chip. - R. Brett Tremaine; T. Basil Smith; Michael E. Wazlowski; David Har; Kwok-Ken Mak; Sujith Arramreddy (IEEE Micro, 2001)

Blue Gene/L, a System-On-A-Chip. - George S. Almási; Daniel K. Beece; Ralph Bellofatto; Gyan Bhanot; Randy Bickford; Matthias A. Blumrich; Arthur A. Bright; José R. Brunheroto; Calin Cascaval; José G. Castaños; Luis Ceze; Paul Coteus; et al. (CLUSTER, 2002)

An overview of the BlueGene/L Supercomputer. - Narasimha R. Adiga; George Almási 001; George S. Almási; Yariv Aridor; Rajkishore Barik; Daniel K. Beece; Ralph Bellofatto; Gyan Bhanot; Randy Bickford; Matthias A. Blumrich; Arthur A. Bright; José R. Brunheroto; et al. (SC, 2002)

Verification strategy for the Blue Gene/L chip. - Michael E. Wazlowski; Narasimha R. Adiga; Daniel K. Beece; Ralph Bellofatto; Matthias A. Blumrich; Dong Chen 005; Marc Boris Dombrowa; Alan Gara; Mark Giampapa; Ruud A. Haring; Philip Heidelberger; Dirk Hoenicke; et al. (IBM J. Res. Dev., 2005)

IBM System z10 Open Systems Adapter Ethernet data router. - Howard M. Haynie; Jeffrey M. Turner; Jeffrey C. Hanscom; Michael Cadigan; Nihad Hadzic; Daniele Di Genova; John Aylward; Sean W. Salisbury; Philip A. Sciuto; Thomas D. Needham; Clinton E. Bubb; R. Brett Tremaine (IBM J. Res. Dev., 2009)

Server-class DDR3 SDRAM memory buffer chip. - Gary A. Van Huben; Kirk D. Lamb; R. Brett Tremaine; B. E. Aleman; S. M. Rubow; S. H. Rider; Warren E. Maule; Michael E. Wazlowski (IBM J. Res. Dev., 2012)