CCSimP - An Instruction-level Custom-Configurable Processor for FPLDs. - Zoran A. Salcic; R. Bruce Maunder (FPL, 1996)

FPLD HDL synthesis employing high-level evolutionary algorithm optimisation. - R. Bruce Maunder; Zoran A. Salcic; George G. Coghill (FPL, 1997)

Genetic Algorithm Optimisation of FPLD Circuit Synthesis from High-Level Modular Descriptions. - R. Bruce Maunder; George G. Coghill; Zoran A. Salcic (ICONIP (1), 1997)

High-Level Hierachical HDL Synthesis of Pipelined FPGA-Based Circuits Using Synchronous Modules. - R. Bruce Maunder; Zoran A. Salcic; George G. Coghill (FPL, 1999)

A genetic algorithm high-level optimizer for complex datapath and data-flow digital systems. - Zoran Salcic; George G. Coghill; R. Bruce Maunder (Appl. Soft Comput., 2007)