Defect Analysis and Fault Modeling in MOS Technology. - R. Chandramouli; Hector R. Sucar (ITC, 1985)

CMOS Custom Implementation of the SPARC Architecture. - Masood Namjoo; F. Abu-Nofal; Doug Carmean; R. Chandramouli; Y. Chang; J. Goforth; W. Hsu; Rick Iwamoto; C. Murphy; U. Naot; Mike Parkin; Joan M. Pendleton; et al. (COMPCON, 1988)

Strategies for Low-Cost Test. - Rohit Kapur; R. Chandramouli; Thomas W. Williams (IEEE Des. Test Comput., 2001)

Integrating DFT in the Physical Synthesis Flow. - Loïs Guiller; Frederic Neuveux; S. Duggirala; R. Chandramouli; Rohit Kapur (ITC, 2002)

Managing Test and Repair of Embedded Memory Subsystem in SoC. - R. Chandramouli (Asian Test Symposium, 2005)

Infrastructure IP design for repair in nanometer technologies. - R. Chandramouli (IEEE Des. Test Comput., 2005)

Session Abstract. - R. Chandramouli (VTS, 2006)