Temporal logic formulation of assembly sequence properties. - Seow Kiam Tian; R. Devanathan (ICRA, 1992)

A Design Methodology for Very Large Array Processors - Part 1: Gipop Processor Array. - N. Venkateswaran 001; S. Pattabiraman; R. Devanathan; B. Kumaran; Ashraf Ahmed; Sankara Narayanan; Radharamanan (Int. J. Pattern Recognit. Artif. Intell., 1995)

Knowledge Engineering of Creative Musical Expressions Using Carnatic Music Ideology. - S. Ganesh Ram; C. T. Palaniappan; M. S. Ramakrishnan; R. Devanathan (FLAIRS, 2004)

Energy efficient dynamic multi-level hierarchical clustering technique for network discovery in wireless sensor networks. - Aby K. Thomas; R. Devanathan (ICUMT, 2011)