Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic. - Kalarikkal Absel; Lijo Manuel; R. K. Kavitha (IEEE Trans. Very Large Scale Integr. Syst., 2013)

High-Speed Dynamic Asynchronous Pipeline: Self-Precharging Style. - C. K. Midhun; Jephy Joy; R. K. Kavitha (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Knowledge sharing through pair programming in learning environments: An empirical study. - R. K. Kavitha; M. S. Irfan Ahmed (Educ. Inf. Technol., 2015)

Low Power Data Driven Conditional Precharge Dynamic Flip Flop. - R. K. Kavitha; Vineeth Johns Toms; Vipin Vinayakan; B. Venkataramani (J. Low Power Electron., 2017)

High-performance asynchronous pipeline using embedded delay element. - R. K. Kavitha; A. Khajamastan; Y. Rama Akhilesh; B. Venkataramani (Microprocess. Microsystems, 2020)