Amit R. Pandey
According to our database1,
Amit R. Pandey
authored at least 2 papers
in 2002.
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Bibliography
2002
Reconfiguration Technique for Reducing Test Time and Test Data Volume in Illinois Scan Architecture Based Designs .
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
An Incremental Algorithm for Test Generation in Illinois Scan Architecture Based Designs.
Proceedings of the 2002 Design, 2002