Self Clock-Gating Scheme for Low Power Basic Logic Element Architecture. - R. Udaiyakumar; Senoj Joseph; T. V. P. Sundararajan; Dhasarathan Vigneswaran; R. Maheswar 001; Iraj S. Amiri (Wirel. Pers. Commun., 2018)

Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance. - R. Udaiyakumar; Senoj Joseph; T. V. P. Sundararajan; Dhasarathan Vigneswaran; R. Maheswar 001; Iraj S. Amiri (Wirel. Pers. Commun., 2018)

Adaptive neuro-fuzzy behavioral learning strategy for effective decision making in the fuzzy-based cloud service negotiation framework. - Rajkumar Rajavel; Kanagachidambaresan Iyer; R. Maheswar 001; P. Jayarajan; R. Udaiyakumar (J. Intell. Fuzzy Syst., 2019)