A novel architecture for LZSS compression of configuration bitstreams within FPGA. - Radek Isa; Jirí Matousek 003 (DDECS, 2017)

Verification of Generated RTL from P4 Source Code. - Radek Isa; Pavel Benácek; Viktor Pus (ICNP, 2018)

DMA Medusa: A Vendor-Independent FPGA-Based Architecture for 400 Gbps DMA Transfers. - Jan Kubálek; Jakub Cabal; Martin Spinler; Radek Isa (FCCM, 2021)