A Methodology for Early Exploration of TSV Placement Topologies in 3D Stacked ICs. - Radhika Sanjeev Jagtap; Sumeet S. Kumar; Rene van Leuken 001 (DSD, 2012)

System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3-D MP-SOCs. - Sumeet S. Kumar; Arnica Aggarwal; Radhika Sanjeev Jagtap; Amir Zjajo; Rene van Leuken 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)