CLEVER: Cross-Layer Error Verification, Evaluation and Reporting. - Rafael Kioji Vivas Maeda; Frank Sill Torres (SBCCI, 2014)

Alleviate chip I/O pin constraints for multicore processors through optical interconnects. - Zhehui Wang; Jiang Xu 001; Peng Yang 003; Xuan Wang 001; Zhe Wang 003; Luan H. K. Duong; Zhifei Wang; Haoran Li 002; Rafael Kioji Vivas Maeda; Xiaowen Wu; Yaoyao Ye; Qinfen Hao (ASP-DAC, 2015)

Adaptively tolerate power-gating-induced power/ground noise under process variations. - Zhe Wang 003; Xuan Wang 001; Jiang Xu 001; Xiaowen Wu; Zhehui Wang; Peng Yang 003; Luan H. K. Duong; Haoran Li 002; Rafael Kioji Vivas Maeda; Zhifei Wang (DATE, 2015)

JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. - Rafael K. V. Maeda; Peng Yang 003; Xiaowen Wu; Zhe Wang 003; Jiang Xu 001; Zhehui Wang; Haoran Li 002; Luan H. K. Duong; Zhifei Wang (AISTECS@HiPEAC, 2016)

Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign. - Xuan Wang 001; Jiang Xu 001; Zhe Wang 003; Haoran Li 002; Peng Yang 003; Luan H. K. Duong; Rafael K. V. Maeda; Zhifei Wang (ACM J. Emerg. Technol. Comput. Syst., 2016)

Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. - Luan H. K. Duong; Zhehui Wang; Mahdi Nikdast; Jiang Xu 001; Peng Yang 003; Zhifei Wang; Zhe Wang 003; Rafael K. V. Maeda; Haoran Li 002; Xuan Wang 001; Sébastien Le Beux; Yvain Thonnart (IEEE Trans. Very Large Scale Integr. Syst., 2016)

An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC. - Zhe Wang 003; Xuan Wang 001; Jiang Xu 001; Haoran Li 002; Rafael K. V. Maeda; Zhehui Wang; Peng Yang 003; Luan H. K. Duong; Zhifei Wang (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects. - Zhehui Wang; Jiang Xu 001; Peng Yang 003; Luan Huu Kinh Duong; Zhifei Wang; Xuan Wang 001; Zhe Wang 003; Haoran Li 002; Rafael Kioji Vivas Maeda (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Improve Chip Pin Performance Using Optical Interconnects. - Zhehui Wang; Jiang Xu 001; Peng Yang 003; Xuan Wang 001; Zhe Wang 003; Luan Huu Kinh Duong; Zhifei Wang; Rafael Kioji Vivas Maeda; Haoran Li 002 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system. - Zhe Wang 003; Zhongyuan Tian; Jiang Xu 001; Rafael K. V. Maeda; Haoran Li 002; Peng Yang 003; Zhehui Wang; Luan H. K. Duong; Zhifei Wang; Xuanqi Chen (ASP-DAC, 2017)

MOCA: an Inter/Intra-Chip Optical Network for Memory. - Zhehui Wang; Zhengbin Pang; Peng Yang 003; Jiang Xu 001; Xuanqi Chen; Rafael K. V. Maeda; Zhifei Wang; Luan H. K. Duong; Haoran Li 002; Zhe Wang 003 (DAC, 2017)

Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators. - Haoran Li 002; Jiang Xu 001; Zhe Wang 003; Peng Yang 003; Rafael K. V. Maeda; Zhongyuan Tian (DATE, 2017)

Fast and Accurate Exploration of Multi-level Caches Using Hierarchical Reuse Distance. - Rafael K. V. Maeda; Qiong Cai; Jiang Xu 001; Zhe Wang 003; Zhongyuan Tian (HPCA, 2017)

Energy-Efficient Power Delivery System Paradigms for Many-Core Processors. - Haoran Li 002; Xuan Wang 001; Jiang Xu 001; Zhe Wang 003; Rafael K. V. Maeda; Zhehui Wang; Peng Yang 003; Luan H. K. Duong; Zhifei Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Multi-device collaborative management through knowledge sharing. - Zhongyuan Tian; Zhe Wang 003; Haoran Li 002; Peng Yang 003; Rafael Kioji Vivas Maeda; Jiang Xu 001 (ASP-DAC, 2018)

Co-manage power delivery and consumption for manycore systems using reinforcement learning. - Haoran Li 002; Zhongyuan Tian; Rafael K. V. Maeda; Xuanqi Chen; Jun Feng 008; Jiang Xu 001 (ICCAD, 2018)

Decentralized Collaborative Power Management through Multi-Device Knowledge Sharing. - Zhongyuan Tian; Haoran Li 002; Rafael Kioji Vivas Maeda; Jun Feng 008; Jiang Xu 001 (ICCD, 2018)

Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors. - Haoran Li 002; Jiang Xu 001; Zhe Wang 003; Rafael K. V. Maeda; Peng Yang 003; Zhongyuan Tian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Collaborative Power Management Through Knowledge Sharing Among Multiple Devices. - Zhongyuan Tian; Zhe Wang 003; Jiang Xu 001; Haoran Li 002; Peng Yang 003; Rafael Kioji Vivas Maeda (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. - Peng Yang 003; Zhehui Wang; Zhifei Wang; Jiang Xu 001; Yi-Shing Chang; Xuanqi Chen; Rafael K. V. Maeda; Jun Feng 008 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Chip-Specific Power Delivery and Consumption Co-Management for Process-Variation-Aware Manycore Systems Using Reinforcement Learning. - Haoran Li 002; Zhongyuan Tian; Jiang Xu 001; Rafael K. V. Maeda; Zhehui Wang; Zhifei Wang (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Multidevice Collaborative Power Management Through Decentralized Knowledge Sharing. - Zhongyuan Tian; Jiang Xu 001; Haoran Li 002; Rafael Kioji Vivas Maeda (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Fast and Accurate Statistical Simulation of Shared-Memory Applications on Multicore Systems. - Fan Jiang; Rafael K. V. Maeda; Jun Feng 008; Shixi Chen; Lin Chen 029; Xiao Li; Jiang Xu 001 (IEEE Trans. Parallel Distributed Syst., 2022)