System-level performance evaluation of three-dimensional integrated circuits. - Arifur Rahman; Rafael Reif (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Wiring requirement and three-dimensional integration of field-programmable gate arrays. - Arifur Rahman; Shamik Das; Anantha P. Chandrakasan; Rafael Reif (SLIP, 2001)

Interconnect limits on gigascale integration (GSI) in the 21st century. - Jeffery A. Davis; Raguraman Venkatesan; Alan Kaloyeros; Michael Beylansky; Shukri J. Souri; Kaustav Banerjee; Krishna C. Saraswat; Arifur Rahman; Rafael Reif; James D. Meindl (Proc. IEEE, 2001)

Fabrication Technologies for Three-Dimensional Integrated Circuits (invited). - Rafael Reif; Andy Fan; Kuan-Neng Chen; Shamik Das (ISQED, 2002)

Design tools for 3-D integrated circuits. - Shamik Das; Anantha P. Chandrakasan; Rafael Reif (ASP-DAC, 2003)

Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools. - Shamik Das; Anantha P. Chandrakasan; Rafael Reif (ISVLSI, 2003)

Wiring requirement and three-dimensional integration technology for field programmable gate arrays. - Arifur Rahman; Shamik Das; Anantha P. Chandrakasan; Rafael Reif (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Timing, energy, and thermal performance of three-dimensional integrated circuits. - Shamik Das; Anantha P. Chandrakasan; Rafael Reif (ACM Great Lakes Symposium on VLSI, 2004)

Technology, performance, and computer-aided design of three-dimensional integrated circuits. - Shamik Das; Andy Fan; Kuan-Neng Chen; Chuan Seng Tan; Nisha Checka; Rafael Reif (ISPD, 2004)

Calibration of Rent's rule models for three-dimensional integrated circuits. - Shamik Das; Anantha P. Chandrakasan; Rafael Reif (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL. - Nisha Checka; Anantha P. Chandrakasan; Rafael Reif (CICC, 2005)