Impact of Process Variations on Flip-Flops Energy and Timing Characteristics. - Marco Lanuzza; Raffaele De Rose; Fabio Frustaci; Stefania Perri; Pasquale Corsonello (ISVLSI, 2010)

Impact of Process Variations on Pulsed Flip-Flops: Yield Improving Circuit-Level Techniques and Comparative Analysis. - Marco Lanuzza; Raffaele De Rose; Fabio Frustaci; Stefania Perri; Pasquale Corsonello (PATMOS, 2010)

Comparative analysis of yield optimized pulsed flip-flops. - Marco Lanuzza; Raffaele De Rose; Fabio Frustaci; Stefania Perri; Pasquale Corsonello (Microelectron. Reliab., 2012)

A methodology to account for the finger interruptions in solar cell performance. - Raffaele De Rose; Antonio Malomo; Paolo Magnone; Felice Crupi; Giorgio Cellere; Marco Martire; Diego Tonini; Enrico Sangiorgi (Microelectron. Reliab., 2012)

A Framework for Energy-Efficiency in Smart Home Environments. - Raffaele De Rose; Carmelo Felicetti; Cinzia Raso; Alberto Michele Felicetti; Salvatore Ammirato (PRO-VE, 2014)

Designing Dynamic Carry Skip Adders: Analysis and Comparison. - Raffaele De Rose; Marco Lanuzza; Fabio Frustaci; Sohan Purohit (Circuits Syst. Signal Process., 2014)

Design of a sub-1-V nanopower CMOS current reference. - Raffaele De Rose; Domenico Albano; Felice Crupi; Marco Lanuzza (ECCTD, 2017)

A variation-aware simulation framework for hybrid CMOS/spintronic circuits. - Raffaele De Rose; Marco Lanuzza; Felice Crupi; Giulio Siracusano; Riccardo Tomasello; Giovanni Finocchio; Mario Carpentieri; Massimo Alioto (ISCAS, 2017)

Impact of voltage scaling on STT-MRAMs through a variability-aware simulation framework. - Raffaele De Rose; Greta Carangelo; Marco Lanuzza; Felice Crupi; Giovanni Finocchio; Mario Carpentieri (SMACD, 2017)

Low energy/delay overhead level shifter for wide-range voltage conversion. - Marco Lanuzza; Felice Crupi; Sandro Rao; Raffaele De Rose; Giuseppe Iannaccone (Int. J. Circuit Theory Appl., 2017)

A physical unclonable function based on a 2-transistor subthreshold voltage divider. - Raffaele De Rose; Felice Crupi; Marco Lanuzza; Domenico Albano (Int. J. Circuit Theory Appl., 2017)

An Ultralow-Voltage Energy-Efficient Level Shifter. - Marco Lanuzza; Felice Crupi; Sandro Rao; Raffaele De Rose; Sebastiano Strangio; Giuseppe Iannaccone (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Design of a 3T current reference for low-voltage, low-power operation. - Raffaele De Rose; Felice Crupi; Maksym Paliy; Marco Lanuzza; Giuseppe Iannaccone (ICICDT, 2018)

Impact of the Emitter Contact Pattern in c-Si BC- BJ Solar Cells by Numerical Simulations. - Noemi Guerra; Raffaele De Rose; Marco Guevara; Paul Procel; Marco Lanuzza; Felice Crupi (RTSI, 2018)

A portable class of 3-transistor current references with low-power sub-0.5 V operation. - Felice Crupi; Raffaele De Rose; Maksym Paliy; Marco Lanuzza; Mattia Perna; Giuseppe Iannaccone (Int. J. Circuit Theory Appl., 2018)

A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits. - Raffaele De Rose; Marco Lanuzza; Felice Crupi; Giulio Siracusano; Riccardo Tomasello; Giovanni Finocchio; Mario Carpentieri; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Evaluating the Energy Efficiency of STT-MRAMs Based on Perpendicular MTJs with Double Reference Layers. - Marco Lanuzza; Raffaele De Rose; Esteban Garzón; Felice Crupi (ASICON, 2019)

Device-to-System Level Simulation Framework for STT-DMTJ Based Cache Memory. - Esteban Garzón; Raffaele De Rose; Felice Crupi; Marco Lanuzza (ICECS, 2019)

An Energy Aware Variation-Tolerant Writing Termination Control for STT-based Non Volatile Flip-Flops. - Marco Lanuzza; Raffaele De Rose; Felice Crupi; Massimo Alioto (ICECS, 2019)

Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs. - Esteban Garzón; Raffaele De Rose; Felice Crupi; Lionel Trojman; Giovanni Finocchio; Mario Carpentieri; Marco Lanuzza (SMACD, 2019)

Double-precision Dual Mode Logic carry-save multiplier. - Raffaele De Rose; Paul Romero; Marco Lanuzza (Integr., 2019)

A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2, 200-μm2 Area in 180nm. - Luigi Fassio; Longyang Lin; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Massimo Alioto (VLSI Circuits, 2020)

Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework. - Esteban Garzón; Raffaele De Rose; Felice Crupi; Lionel Trojman; Giovanni Finocchio; Mario Carpentieri; Marco Lanuzza (Integr., 2020)

A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy. - Luigi Fassio; Longyang Lin; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Massimo Alioto (ESSCIRC, 2021)

Trimming-Less Voltage Reference for Highly Uncertain Harvesting Down to 0.25 V, 5.4 pW. - Luigi Fassio; Longyang Lin; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Massimo Alioto (IEEE J. Solid State Circuits, 2021)

A 0.6-to-1.8V CMOS Current Reference With Near-100% Power Utilization. - Luigi Fassio; Longyang Lin; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Massimo Alioto (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter. - Luigi Fassio; Francesco Settino; Longyang Lin; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Massimo Alioto (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Stability-Area Trade-off in Static CMOS PUF Based on 4T Subthreshold Voltage Divider. - Massimo Vatalaro; Raffaele De Rose; Marco Lanuzza; Felice Crupi (ICECS 2022, 2022)

Adjusting Thermal Stability in Double-Barrier MTJ for Energy Improvement in Cryogenic STT-MRAMs. - Esteban Garzón; Raffaele De Rose; Felice Crupi; Lionel Trojman; Adam Teman; Marco Lanuzza (CoRR, 2022)

Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing. - Raffaele De Rose; Tommaso Zanotti; Francesco Maria Puglisi; Felice Crupi; Paolo Pavan; Marco Lanuzza (CoRR, 2022)

Static CMOS Physically Unclonable Function Based on 4T Voltage Divider With 0.6%-1.5% Bit Instability at 0.4-1.8 V Operation in 180 nm. - Massimo Vatalaro; Raffaele De Rose; Marco Lanuzza; Felice Crupi (IEEE J. Solid State Circuits, 2022)

Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V. - Luigi Fassio; Longyang Lin; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Massimo Alioto (IEEE Access, 2023)

SIMPLY+: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing. - Tatiana Moposita; Esteban Garzón; Raffaele De Rose; Felice Crupi; Andrei Vladimirescu; Lionel Trojman; Marco Lanuzza (IEEE Access, 2023)

Experimental analysis of variability in WS2-based devices for hardware security. - Massimo Vatalaro; H. Neill; F. Gity; Paolo Magnone; Vincenzo Maccaronio; C. Márquez; J. C. Galdon; F. Gamiz; Felice Crupi; P. Hurley; Raffaele De Rose (CoRR, 2023)

Design of a Temperature-Aware Voltage Generator for 2-Bit Read Operation in STT-MRAM Based SIMPLY Architecture. - Massimo Vatalaro; Vincenzo Maccaronio; Tommaso Zanotti; Erika Borellini; Felice Crupi; Francesco Maria Puglisi; Raffaele De Rose (ICICDT, 2025)

Design for Reliability of Multi-Bit Operations in RRAM-Based SIMPLY Logic-in-Memory Circuits. - Tommaso Zanotti; Erika Borellini; Massimo Vatalaro; Vincenzo Maccaronio; Paolo Pavan; Raffaele De Rose; Francesco Maria Puglisi (ICICDT, 2025)

A Multi-Bit PUF Architecture Using a 2T Sub-Threshold Voltage Divider. - Massimo Vatalaro; Raffaele De Rose; Vincenzo Maccaronio; Marco Lanuzza; Felice Crupi (ISCAS, 2025)

PUF-Based Authentication-Oriented Architecture for Identification Tags. - Antonino Rullo; Carmelo Felicetti; Massimo Vatalaro; Raffaele De Rose; Marco Lanuzza; Felice Crupi; Domenico Saccà (IEEE Trans. Dependable Secur. Comput., 2025)

Highly Stable PUFs Based on Stacked Voltage Divider for Near-Zero BER Native Sensitivity to Voltage Variations. - Massimo Vatalaro; Raffaele De Rose; Vincenzo Maccaronio; Marco Lanuzza; Felice Crupi (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)