Occurrence and Simulation of Index-3 DAEs in VLSI Circuits. - Raghuram Srinivasan; Harold W. Carter (BMAS, 2008)

A taylor series methodology for analyzing the effects of process variation on circuit operation. - Raghuram Srinivasan; Harold W. Carter (ACM Great Lakes Symposium on VLSI, 2009)

Efficient management of last-level caches in graphics processors for 3D scene rendering workloads. - Jayesh Gaur; Raghuram Srinivasan; Sreenivas Subramoney; Mainak Chaudhuri (MICRO, 2013)