A Systematic DFT Procedure for Library Cells. - Jingjing Xu; Rahul Kundu; F. Joel Ferguson (VTS, 1999)

Identification of crosstalk switch failures in domino CMOS circuits. - Rahul Kundu; Ronald D. Blanton (ITC, 2000)

Testing of Dynamic Logic Circuits Based on Charge Sharing. - Keerthi Heragu; Manish Sharma; Rahul Kundu; R. D. (Shawn) Blanton (VTS, 2001)

Timed Test Generation Crosstalk Switch Failures in Domino CMOS Circuits. - Rahul Kundu; R. D. (Shawn) Blanton (VTS, 2002)

Test vector generation for charge sharing failures in dynamic logic. - Keerthi Heragu; Manish Sharma; Rahul Kundu; Ronald D. Blanton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

ATPG for Noise-Induced Switch Failures in Domino Logic. - Rahul Kundu; R. D. (Shawn) Blanton (ICCAD, 2003)

Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk. - Rahul Kundu; R. D. (Shawn) Blanton (ITC, 2003)

CONCAT: CONflict Driven Learning in ATPG for Industrial designs. - Surendra Bommu; Kameshwar Chandrasekar; Rahul Kundu; Sanjay Sengupta (ITC, 2008)

A Distributed Error and Anomaly Communication Architecture for Analog and Mixed-Signal Systems. - Rahul Kundu; Fei Su; Prashant Goteti (J. Electron. Test., 2019)