Combining Background Memory Management and Regular Array Co-Partitioning, Illustrated on a Full Motion Estimation Kernel. - Rainer Schaffer; Francky Catthoor; Renate Merker (Parallel Algorithms Appl., 2000)

Systematic Design of Programs with Sub-Word Parallelism. - Rainer Schaffer; Renate Merker; Francky Catthoor (PARELEC, 2002)

Causality Constraints for Processor Architectures with Sub-Word Parallelism. - Rainer Schaffer; Renate Merker; Francky Catthoor (DSD, 2003)

A Hardware-Software System for Tomographic Reconstruction. - Jan Müller 001; Dirk Fimmel; Renate Merker; Rainer Schaffer (J. Circuits Syst. Comput., 2003)

A Parallel Hardware-Software System for Signal Processing Algorithms. - Mathias Kortke; Jan Müller 001; Rainer Schaffer; Sebastian Siegel; Renate Merker; Jürgen Kelber (PARELEC, 2004)

Co-Design of Massively Parallel Embedded Processor Architectures. - Frank Hannig; Hritam Dutta; Alexey Kupriyanov; Jürgen Teich; Rainer Schaffer; Sebastian Siegel; Renate Merker; Ronan Keryell; Bernard Pottier; Daniel Chillet; Daniel Ménard; Olivier Sentieys (ReCoSoC, 2005)

An Architecture Description Language for Massively Parallel Processor Architectures. - Alexey Kupriyanov; Frank Hannig; Dmitrij Kissler; Jürgen Teich; Rainer Schaffer; Renate Merker (MBMV, 2006)

Derivation of Packing Instructions for Exploiting Sub-Word Parallelism. - Rainer Schaffer; Renate Merker; Francky Catthoor (PARELEC, 2006)

Efficient Realization of the Edge Detection Algorithm on a Processor Array with Parallelism on Two Levels. - Sebastian Siegel; Rainer Schaffer; Renate Merker (PARELEC, 2006)

Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism. - Rainer Schaffer; Renate Merker (ICSAMOS, 2006)

Massively Parallel Processor Architectures: A Co-design Approach. - Hritam Dutta; Frank Hannig; Alexey Kupriyanov; Dmitrij Kissler; Jürgen Teich; Rainer Schaffer; Sebastian Siegel; Renate Merker; Bernard Pottier (ReCoSoC, 2007)

Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism. - Rainer Schaffer; Renate Merker; Frank Hannig; Jürgen Teich (DSD, 2008)

Parallelisierung von Algorithmen zur Nutzung auf Architekturen mit Teilwortparallelität. - Rainer Schaffer (Vogt, 2010)

Administration- and communication-aware IP core mapping in scalable multiprocessor system-on-chips via evolutionary computing. - Falko Guderian; Rainer Schaffer; Gerhard P. Fettweis (IEEE Congress on Evolutionary Computation, 2012)

Dimensioning the heterogeneous multicluster architecture via parallelism analysis and evolutionary computing. - Falko Guderian; Rainer Schaffer; Gerhard P. Fettweis (IEEE Congress on Evolutionary Computation, 2012)

Assessment and Level Modelling in Fundamentals of Electrical Engineering. - Alison Klein; Jens Müller; Nico Link; Rainer Schaffer (Int. J. Eng. Pedagog., 2024)