Multi-Bit Sigma Delta ADC with Reduced Feedback Levels, Extended Dynamic Range and Increased Tolerance for Analog Imperfections. - Jian-Yi Wu; Raj Subramoniam; Zhenyong Zhang; Ali Djabbari; Peter Holloway; Franco Maloberti; Masood Yousefi; Mehmat Aslan; Hua Hong; Ahmad Bahai (CICC, 2007)

A 107.4 dB SNR Multi-Bit Sigma Delta ADC With 1-PPM THD at -0.12 dB From Full Scale Input. - Jian-Yi Wu; Zhenyong Zhang; Raj Subramoniam; Franco Maloberti (IEEE J. Solid State Circuits, 2009)