Measuring Experimental Error in Microprocessor Simulation. - Rajagopalan Desikan; Doug Burger; Stephen W. Keckler (ISCA, 2001)

Errata on "Measuring Experimental Error in Microprocessor Simulation". - Rajagopalan Desikan; Doug Burger; Stephen W. Keckler; José-Lorenzo Cruz; Fernando Latorre; Antonio González 001; Mateo Valero (SIGARCH Comput. Archit. News, 2002)

Scalable selective re-execution for EDGE architectures. - Rajagopalan Desikan; Simha Sethumadhavan; Doug Burger; Stephen W. Keckler (ASPLOS, 2004)

Scalable Hardware Memory Disambiguation for High-ILP Processors. - Simha Sethumadhavan; Rajagopalan Desikan; Doug Burger; Charles R. Moore; Stephen W. Keckler (IEEE Micro, 2004)

Design and Implementation of the TRIPS Primary Memory System. - Simha Sethumadhavan; Robert G. McDonald; Rajagopalan Desikan; Doug Burger; Stephen W. Keckler (ICCD, 2006)

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Robert G. McDonald; Rajagopalan Desikan; Saurabh Drolia; M. S. Govindan; Paul Gratz; Divya Gulati; Heather Hanson; Changkyu Kim; Haiming Liu 001; Nitya Ranganathan; et al. (MICRO, 2006)