Exploiting temporal idleness to reduce leakage power in programmable architectures. - Rajarshee P. Bharadwaj; Rajan Konar; Poras T. Balsara; Dinesh Bhatia (ASP-DAC, 2005)

FPGA Architecture for Standby Power Management. - Rajarshee P. Bharadwaj; Rajan Konar; Dinesh Bhatia; Poras T. Balsara (FPT, 2005)

Exploring Logic Block Granularity in Leakage Tolerant FPGA. - Rajan Konar; Rajarshee P. Bharadwaj; Dinesh Bhatia; Poras T. Balsara (VLSI Design, 2006)