A high performance, high voltage output buffer in a low voltage CMOS process. - Rajat Chauhan; Karthik Rajagopal; Vinod Menezes; H. M. Roopashree; Sanish Koshy Jacob (CICC, 2005)

A Robust Level-Shifter Design for Adaptive Voltage Scaling. - Ankur Gupta; Rajat Chauhan; Vinod Menezes; Vikas Narang; H. M. Roopashree (VLSI Design, 2008)

Input Referred Offset Reduction in Very High Speed Differential Receivers. - Rajat Chauhan; Manigandan Selvam (VLSI Design, 2013)

Fail-safe I/O to control RESET# pin of DDR3 SDRAM and achieve ultra-low system power. - Rajat Chauhan; Prajkta Vyavahare; Siva Kothamasu (ISQED, 2015)

Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting. - Sundeep Javvaji; Vipul Singhal 001; Vinod Menezes; Rajat Chauhan; Shanthi Pavan (ESSCIRC, 2018)

Engineering sequence and stimuli dependent doxorubicin release from anti-nucleolin aptamer coated gold nanoparticles. - Rajat Chauhan; Nicholas C. Allen; Robert S. Keynton; Paula J. Bates; Mohammed T. Malik; Martin G. O. Toole (ISSPIT, 2018)

Gold Nanoparticles Conjugate Cancer-Targeting Aptamer and Gadolinium Chelate for MR Cancer Imaging. - Nagwa ElBaz; Rajat Chauhan; Kurtis T. James; Danial A. Malik; Mingming Zhu; Ayman El-Baz; Robert S. Keynton; Chin K. Ng; Paula J. Bates; Tariq Malik; Martin G. O. Toole (ISSPIT, 2018)

A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems. - R. R. Manikandan; Vipul Kumar Singhal 001; Rajat Chauhan; Vinod Menezes; Mahesh Mehendale (VLSID, 2018)

Single Inductor Dual Output Buck Converter for Low Power Applications and Its Stability Analysis. - Sowmya Sankaranarayanan; Kulkarni Chaitali Vinod; Aswanth Sreekumar; Tonse Laxminidhi; Vipul Singhal 001; Rajat Chauhan (VLSID, 2018)

A K-Means-Galactic Swarm Optimization-Based Clustering Algorithm with Otsu's Entropy for Brain Tumor Detection. - Satyasai Jagannath Nanda; Ishank Gulati; Rajat Chauhan; Rahul Modi; Uttam Dhaked (Appl. Artif. Intell., 2019)

Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting. - Sundeep Javvaji; Vipul Singhal 001; Vinod Menezes; Rajat Chauhan; Shanthi Pavan (IEEE J. Solid State Circuits, 2019)

A 0.75-5V, 15.8 nA with 1.8 μs Delay Supply Voltage Supervisor using Adaptively Biased Comparator and Sample & Hold Technique for IoT. - Ashutosh Chitnis; Rajat Chauhan; Divya Kaur; Qadeer Khan (CICC, 2021)

150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications. - Vipul Singhal 001; Rajat Chauhan; Vinod Menezes; R. R. Manikandan; Raveesh Magod; Mahesh Mehendale; Anantha P. Chandrakasan (VLSID, 2021)