A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test. - Rajath Vasudevamurthy; Pratap Kumar Das; Bharadwaj Amrutur (ISCAS, 2011)

0.84 ps Resolution Clock Skew Measurement via Subsampling. - Bharadwaj Amrutur; Pratap Kumar Das; Rajath Vasudevamurthy (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Multiphase Technique to Speed-up Delay Measurement via Sub-sampling. - Rajath Vasudevamurthy; Bharadwaj Amrutur (VLSI Design, 2013)

Time-Based All-Digital Technique for Analog Built-in Self-Test. - Rajath Vasudevamurthy; Pratap Kumar Das; Bharadwaj Amrutur (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Pulse-width Modulation Technique for Generation of Multiple Analog Voltages for On-chip Calibration. - Rajath Vasudevamurthy (VLSID, 2022)