Optimal single probe traversal algorithm for testing of MCM substrat. - Rajesh Pendurkar; Abhijit Chatterjee; Craig A. Tovey (ICCD, 1996)

Synthesis of BIST hardware for performance testing of MCM interconnections. - Rajesh Pendurkar; Abhijit Chatterjee; Yervant Zorian (ICCAD, 1998)

A distributed BIST technique for diagnosis of MCM interconnections. - Rajesh Pendurkar; Abhijit Chatterjee; Yervant Zorian (ITC, 1998)

Single-probe traversal optimization for testing of MCM substrate interconnections. - Rajesh Pendurkar; Craig A. Tovey; Abhijit Chatterjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Design for testability techniques and optimization algorithms for performance and functional testing of mult-chip module interconnections. - Rajesh Pendurkar (1999)

CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. - Marly Roncken; Ken S. Stevens; Rajesh Pendurkar; Shai Rotem; Parimal Pal Chaudhuri (ASYNC, 2000)

Switching activity generation with automated BIST synthesis forperformance testing of interconnects. - Rajesh Pendurkar; Abhijit Chatterjee; Yervant Zorian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

A Scalable, Low Cost Design-for-Test Architecture for UltraSPARCTM Chip Multi-Processors. - Ishwar Parulkar; Thomas A. Ziaja; Rajesh Pendurkar; Anand D'Souza; Amitava Majumdar 002 (ITC, 2002)

Distributed Diagnosis of Interconnections in SoC and MCM Designs. - Rajesh Pendurkar; Abhijit Chatterjee; Yervant Zorian (J. Electron. Test., 2004)

DFX of a 3rd Generation, 16-core/32-thread UltraSPARC- CMT Microprocessor. - Ishwar Parulkar; Sriram Anandakumar; Gaurav Agarwal; Gordon Liu; Krishna Rajan; Frank Chiu; Rajesh Pendurkar (ITC, 2008)