DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs. - Rajesh Velegalati; Jens-Peter Kaps (FPL, 2009)

DPA Resistant AES on FPGA Using Partial DDL. - Jens-Peter Kaps; Rajesh Velegalati (FCCM, 2010)

Techniques to enable the use of Block RAMs on FPGAS with Dynamic and Differential Logic. - Rajesh Velegalati; Jens-Peter Kaps (ICECS, 2010)

Investigation of DPA Resistance of Block RAMs in Cryptographic Implementations on FPGAs. - Shaunak Shah; Rajesh Velegalati; Jens-Peter Kaps; David Hwang (ReConFig, 2010)

Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs. - Rajesh Velegalati; Jens-Peter Kaps (FPL, 2011)

Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules. - Benjamin Y. Brewster; Ekawat Homsirikamol; Rajesh Velegalati; Kris Gaj (FPT, 2012)

Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques. - Rajesh Velegalati; Kinjal Shah; Jens-Peter Kaps (DSD, 2013)

Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance. - Sohrab Aftabjahani; Mark Tehranipoor; Farimah Farahmandi; Bulbul Ahmed; Ryan Kastner; Francesco Restuccia 002; Andres Meza 001; Kaki Ryan; Nicole Fern; Jasper Van Woudenberg; Rajesh Velegalati; Cees-Bart Breunesse; et al. (VTS, 2023)

Improving CPU Fault Injection Simulations: Insights from RTL to Instruction-Level Models. - Jasper Van Woudenberg; Rajesh Velegalati; Cees-Bart Breunesse; Dennis Vermoen Riscure (FDTC, 2024)