A scalable low power issue queue for large instruction window processors. - Rajesh Vivekanandham; Bharadwaj S. Amrutur; R. Govindarajan (ICS, 2006)

A Scalable Low Power Store Queue for Large InstructionWindow Processors. - Rajesh Vivekanandham; R. Govindarajan (PACT, 2007)

DO-GPU: Domain Optimizable Soft GPUs. - Rui Ma; Jia-Ching Hsu; Tian Tan 007; Eriko Nurvitadhi; Rajesh Vivekanandham; Aravind Dasu; Martin Langhammer; Derek Chiou (FPL, 2021)

Parallelization Strategies for DLRM Embedding Bag Operator on AMD CPUs. - Krishnakumar Nair; Avinash-Chandra Pandey; Siddappa Karabannavar; Meena Arunachalam; John Kalamatianos; Varun Agrawal; Saurabh Gupta 002; Ashish Sirasao; Elliott Delaye; Steven K. Reinhardt; Rajesh Vivekanandham; Ralph Wittig; et al. (IEEE Micro, 2024)