Predictive Modeling of the NBTI Effect for Reliable Design. - Sarvesh Bhardwaj; Wenping Wang 004; Rakesh Vattikonda; Yu Cao 001; Sarma B. K. Vrudhula (CICC, 2006)

Modeling and minimization of PMOS NBTI effect for robust nanometer design. - Rakesh Vattikonda; Wenping Wang 004; Yu Cao 001 (DAC, 2006)

SRAM Cell Optimization for Ultra-Low Power Standby. - Huifang Qin; Rakesh Vattikonda; Thuan Trinh; Yu Cao 001; Jan M. Rabaey (J. Low Power Electron., 2006)

An Integrated Modeling Paradigm of Circuit Reliability for 65nm CMOS Technology. - Wenping Wang 004; Vijay Reddy; Anand T. Krishnan; Rakesh Vattikonda; Srikanth Krishnan; Yu Cao 001 (CICC, 2007)

The Impact of NBTI on the Performance of Combinational and Sequential Circuits. - Wenping Wang 004; Shengqi Yang; Sarvesh Bhardwaj; Rakesh Vattikonda; Sarma B. K. Vrudhula; Frank Liu 001; Yu Cao 001 (DAC, 2007)

A New Simulation Method for NBTI Analysis in SPICE Environment. - Rakesh Vattikonda; Yansheng Luo; Alex Gyure; Xiaoning Qi; Sam C. Lo; Mahmoud Shahram; Yu Cao 001; Kishore Singhal; Dino Toffolon (ISQED, 2007)

Scalable model for predicting the effect of negative bias temperature instability for reliable design. - Sarvesh Bhardwaj; Wenping Wang 004; Rakesh Vattikonda; Yu Cao 001; Sarma B. K. Vrudhula (IET Circuits Devices Syst., 2008)