Time-triggered Network Interface Extension for the Versal Network-an-Chip. - Daniel Onwuchekwa; Josepaul Paulachan; Rakotojaona Nambinina; Roman Obermaisser (ICAIIC, 2023)

Adaptive time-triggered network-on-chip-based multi-core architecture: enhancing safety and energy efficiency (Adaptive zeitgesteuerte Network-on-Chip-basierte Multi-Core-Architektur: Verbesserung von Sicherheit und Energieeffizienz) - Rakotojaona Nambinina (2024)