Towards the design of fault tolerant reversible circuits components of ALU using new PCMF gate. - Rakshith Saligram; T. R. Rakshith (ICACCI, 2013)

Design of Low Logical Cost Conservative Reversible Adders Using Novel PCTG. - Rakshith Saligram (ISED, 2013)

Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit. - Rakshith Saligram; Shrihari Shridhar Hegde; Shashidhar A. Kulkarni; H. R. Bhagyalakshmi; M. K. Venkatesha (CoRR, 2013)

A Model Study of Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication in 2.5D Integration. - Rakshith Saligram; Ankit Kaul; Muhannad S. Bakir; Arijit Raychowdhury (VLSI-SOC, 2020)

Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication. - Rakshith Saligram; Ankit Kaul; Muhannad S. Bakir; Arijit Raychowdhury (VLSI-SoC (Selected Papers), 2020)

CryoMem: A 4K-300K 1.3GHz eDRAM Macro with Hybrid 2T-Gain-Cell in a 28nm Logic Process for Cryogenic Applications. - Rakshith Saligram; Suman Datta; Arijit Raychowdhury (CICC, 2021)

A 64-Bit Arm CPU at Cryogenic temperatures: Design Technology Co-Optimization for Power and Performance. - Rakshith Saligram; Divya Prasad; David Pietromonaco; Arijit Raychowdhury; Brian Cline (CICC, 2021)

Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing. - Wriddhi Chakraborty; P. Shrestha; A. Gupta; Rakshith Saligram; Samuel Spetalnick; J. Campbell; Arijit Raychowdhury; Suman Datta (VLSI Technology and Circuits, 2022)

Design Space Exploration of Interconnect Materials for Cryogenic Operation: Electrical and Thermal Analyses. - Rakshith Saligram; Suman Datta; Arijit Raychowdhury (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Cryogenic CMOS as an Enabler for Low Power Dynamic Logic. - Rakshith Saligram; Suman Datta; Arijit Raychowdhury (ISLPED, 2023)

Cooling the Chaos: Mitigating the Effect of Threshold Voltage Variation in Cryogenic CMOS Memories. - Rakshith Saligram; Amol D. Gaidhane; Yu Kevin Cao; Suman Datta; Arijit Raychowdhury (ISLPED, 2024)

Cryogenic Operation of Computing-In-Memory based Spiking Neural Network. - Laith A. Shamieh; Wei-Chun Wang; Shida Zhang; Rakshith Saligram; Amol D. Gaidhane; Yu Cao 001; Arijit Raychowdhury; Suman Datta; Saibal Mukhopadhyay (ISLPED, 2024)