A 14-GHz Bang-Bang Digital PLL with sub-150fs Integrated Jitter for Wireline Applications in 7nm FinFET. - Dirk Pfaff; Robert Abbott; Xin-Jie Wang; Babak Zamanlooy; Shahaboddin Moazzeni; Raleigh Smith; Chih-Chang Lin (CICC, 2019)

A 14-GHz Bang-Bang Digital PLL With Sub-150-fs Integrated Jitter for Wireline Applications in 7-nm FinFET CMOS. - Dirk Pfaff; Robert Abbott; Xin-Jie Wang; Shahaboddin Moazzeni; Ralph Mason; Raleigh Smith (IEEE J. Solid State Circuits, 2020)