The genealogical approach to the layout problem. - Antoni A. Szepieniec; Ralph H. J. M. Otten (DAC, 1980)

Automatic floorplan design. - Ralph H. J. M. Otten (DAC, 1982)

Stop criteria in simulated annealing. - Ralph H. J. M. Otten; Lukas P. P. P. van Ginneken (ICCD, 1988)

Conflict-free channel definition in building-block layout. - Hong Cai; Ralph H. J. M. Otten (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Optimal slicing of plane point placements. - Lukas P. P. P. van Ginneken; Ralph H. J. M. Otten (EURO-DAC, 1990)

The complexity of adaptive annealing. - Ralph H. J. M. Otten; Lukas P. P. P. van Ginneken (ICCD, 1990)

Tackling cost optimization in testable design by forward inferencing. - Michiel Kraak; Ralph H. J. M. Otten (EURO-DAC, 1992)

Retiming Synchronous Circuitry with Imprecise Delays. - Ireneusz Karkowski; Ralph H. J. M. Otten (DAC, 1995)

An Automatic Hardware-Software Partitioner Based on the Possibilistic Programming. - Ireneusz Karkowski; Ralph H. J. M. Otten (ED&TC, 1996)

Embedded tutorial: Speed - new paradigms in design for performance. - Ralph H. J. M. Otten; Lukas P. P. P. van Ginneken; Narendra V. Shenoy (ICCAD, 1996)

Novel Simulation of Deep-Submicron MOSFET Circuits. - Serban Bruma; Ralph H. J. M. Otten (ICCD, 1997)

Planning for Performance. - Ralph H. J. M. Otten; Robert K. Brayton (DAC, 1998)

Constraints Space Management for the Layout of Analog IC's. - Bogdan G. Arsintescu; Ralph H. J. M. Otten (DATE, 1998)

Global wires: harmful?. - Ralph H. J. M. Otten (ISPD, 1998)

A Novel VLSI Layout Fabric for Deep Sub-Micron Applications. - Sunil P. Khatri; Amit Mehrotra; Robert K. Brayton; Ralph H. J. M. Otten; Alberto L. Sangiovanni-Vincentelli (DAC, 1999)

Timing closure: the solution and its problems. - Raul Camposano; Olivier Coudert; Patrick Groeneveld; Leon Stok; Ralph H. J. M. Otten (ASP-DAC, 2000)

Area and search space control for technology mapping. - Dirk-Jan Jongeneel; Yosinori Watanabe; Robert K. Brayton; Ralph H. J. M. Otten (DAC, 2000)

Challenges in Physical Chip Design. - Ralph H. J. M. Otten; Paul Stravers (ICCAD, 2000)

What is a floorplan?. - Ralph H. J. M. Otten (ISPD, 2000)

Technology mapping for area and speed. - Dirk-Jan Jongeneel; Ralph H. J. M. Otten (Integr., 2000)

Performance planning. - Ralph H. J. M. Otten; Robert K. Brayton (Integr., 2000)

Are wires plannable? - Ralph H. J. M. Otten; Giuseppe S. Garcea (SLIP, 2001)

Design Automation for Deepsubmicron: Present and Future. - Ralph H. J. M. Otten; Raul Camposano; Patrick Groeneveld (DATE, 2002)

Shifts in INTEGRATION: 20 years of VLSI design. - Ralph H. J. M. Otten (Integr., 2002)

Time Budgeting in a Wireplanning Context. - Jurjen Westra; Dirk-Jan Jongeneel; Ralph H. J. M. Otten; Chandu Visweswariah (DATE, 2003)

Analytic model for area and power constrained optimal repeater insertion. - Giuseppe S. Garcea; Nick van der Meijs; Ralph H. J. M. Otten (ESSCIRC, 2003)

Simultaneous Analytic Area and Power Optimization for Repeater Insertion. - Giuseppe S. Garcea; N. P. van der Meijs; Ralph H. J. M. Otten (ICCAD, 2003)

Statistically Aware Buffer Planning. - Giuseppe S. Garcea; N. P. van der Meijs; Kees-Jan van der Kolk; Ralph H. J. M. Otten (DATE, 2004)

Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits. - Jochen A. G. Jess; Kerim Kalafala; Srinath R. Naidu; Ralph H. J. M. Otten; Chandramouli Visweswariah (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Layout Synthesis. - Ralph H. J. M. Otten (Handbook of Algorithms for Physical Design Automation, 2008)

The 3TU embedded systems master in the Netherlands. - Gerard J. M. Smit; Gerrit F. van der Hoeven; Jan Friso Groote; Ralph H. J. M. Otten; Hans Tonino; Ben H. H. Juurlink; Boudewijn R. H. M. Haverkort (WESE@ESWEEK, 2009)