Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis. - Ramakrishna Voorakaranam; Sudip Chakrabarti; Junwei Hou; Alfred V. Gomes; Sasikumar Cherubal; Abhijit Chatterjee; William H. Kao (ITC, 1997)

Modular Fault Simulation of Mixed Signal Circuits with Fault Ranking by Severity. - Alfred V. Gomes; Ramakrishna Voorakaranam; Abhijit Chatterjee (DFT, 1998)

Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test. - Ramakrishna Voorakaranam; Abhijit Chatterjee (ARVLSI, 1999)

Hierarchical Test Generation for Analog Circuits Using Incremental Test Development. - Ramakrishna Voorakaranam; Abhijit Chatterjee (VTS, 1999)

Test Generation for Accurate Prediction of Analog Specifications. - Ramakrishna Voorakaranam; Abhijit Chatterjee (VTS, 2000)

A Signature Test Framework for Rapid Production Testing of RF Circuits. - Ramakrishna Voorakaranam; Sasikumar Cherubal; Abhijit Chatterjee (DATE, 2002)

Production Deployment of a Fast Transient Testing Methodology for Analog Circuits : Case Study and Results. - Ramakrishna Voorakaranam; Randy Newby; Sasikumar Cherubal; Bob Cometta; Thomas Kuehl; David M. Majernik; Abhijit Chatterjee (ITC, 2003)

Concurrent RF Test Using Optimized Modulated RF Stimuli. - Sasikumar Cherubal; Ramakrishna Voorakaranam; Abhijit Chatterjee; John McLaughlin; Jason L. Smith; David M. Majernik (VLSI Design, 2004)

Signature Testing of Analog and RF Circuits: Algorithms and Methodology. - Ramakrishna Voorakaranam; Selim Sermet Akbay; Soumendu Bhattacharya; Sasikumar Cherubal; Abhijit Chatterjee (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)