Early clock prototyping for design analysis and quality entitlement. - Ramamurthy Vishweshwara; Ramakrishnan Venkatraman; Vipul Kadodwala (ISQED, 2009)

An Approach to Measure the Performance Impact of Dynamic Voltage Fluctuations Using Static Timing Analysis. - Ramamurthy Vishweshwara; Ramakrishnan Venkatraman; H. Udayakumar; N. V. Arvind (VLSI Design, 2009)

Placement aware clock gate cloning and redistribution methodology. - Ramamurthy Vishweshwara; Mahita Nagabhiru; Ramakrishnan Venkatraman (ISQED, 2012)