An energy efficient 32nm 20 MB L3 cache for Intel® Xeon® processor E5 family. - Min Huang; Moty Mehalel; Ramesh Arvapalli; Songnian He (CICC, 2012)

An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family. - Min Huang; Moty Mehalel; Ramesh Arvapalli; Songnian He (IEEE J. Solid State Circuits, 2013)