Simultaneous switching ground noise calculation for packaged CMOS devices. - Ramesh Senthinathan; John L. Prince (IEEE J. Solid State Circuits, 1991)

Application specific CMOS output driver circuit design techniques to reduce simultaneous switching noise. - Ramesh Senthinathan; John L. Prince (IEEE J. Solid State Circuits, 1993)

A 650-MHz, IA-32 microprocessor with enhanced data streaming for graphics and video. - Ramesh Senthinathan; Stephen Fischer; Hamid Rangchi; Hadi Yazdanmehr (IEEE J. Solid State Circuits, 1999)

A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips. - Ramin Farjad-Rad; William J. Dally; Hiok-Tiaq Ng; Ramesh Senthinathan; Ming-Ju Edward Lee; Rohit Rathi; John Poulton (IEEE J. Solid State Circuits, 2002)

A 33mW 8Gb/s CMOS clock multiplier and CDR for highly integrated I/Os. - Hiok-Tiaq Ng; Ming-Ju Edward Lee; Ramin Farjad-Rad; Ramesh Senthinathan; William J. Dally; Anhtuyet Nguyen; Rohit Rathi; Trey Greer; John Poulton; John H. Edmondson; James Tran (CICC, 2003)

CMOS High-Speed I/Os - Present and Future. - Ming-Ju Edward Lee; William J. Dally; Ramin Farjad-Rad; Hiok-Tiaq Ng; Ramesh Senthinathan; John H. Edmondson; John W. Poulton (ICCD, 2003)

Jitter transfer characteristics of delay-locked loops - theories and design techniques. - Ming-Ju Edward Lee; William J. Dally; Trey Greer; Hiok-Tiaq Ng; Ramin Farjad-Rad; John Poulton; Ramesh Senthinathan (IEEE J. Solid State Circuits, 2003)

A second-order semidigital clock recovery circuit based on injection locking. - Hiok-Tiaq Ng; Ramin Farjad-Rad; Ming-Ju Edward Lee; William J. Dally; Trey Greer; John Poulton; John H. Edmondson; Rohit Rathi; Ramesh Senthinathan (IEEE J. Solid State Circuits, 2003)

A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os. - Ramin Farjad-Rad; Anhtuyet Nguyen; James Tran; Trey Greer; John Poulton; William J. Dally; John H. Edmondson; Ramesh Senthinathan; Rohit Rathi; Ming-Ju Edward Lee; Hiok-Tiaq Ng (IEEE J. Solid State Circuits, 2004)

A 20-Gb/s 0.13-μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer. - Patrick Chiang 001; William J. Dally; Ming-Ju Edward Lee; Ramesh Senthinathan; Yangjin Oh; Mark A. Horowitz (IEEE J. Solid State Circuits, 2005)