Accurate energy accounting for shared virtualized environments using PMC-based power modeling techniques. - Ramon Bertran; Yolanda Becerra 001; David Carrera 001; Vicenç Beltran 001; Marc González 001; Xavier Martorell; Jordi Torres; Eduard Ayguadé (GRID, 2010)

Decomposable and responsive power models for multicore processors using performance counters. - Ramon Bertran; Marc González 001; Xavier Martorell; Nacho Navarro; Eduard Ayguadé (ICS, 2010)

Design space exploration for aggressive core replication schemes in CMPs. - Lluc Alvarez; Ramon Bertran; Marc González 001; Xavier Martorell; Nacho Navarro; Eduard Ayguadé (HPDC, 2011)

Local Memory Design Space Exploration for High-Performance Computing. - Ramon Bertran; Marc González 001; Xavier Martorell; Nacho Navarro; Eduard Ayguadé (Comput. J., 2011)

Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks. - Ramon Bertran; Alper Buyuktosunoglu; Meeta Sharma Gupta; Marc González 001; Pradip Bose (MICRO, 2012)

POTRA: a framework for building power models for next generation multicore architectures. - Ramon Bertran; Marc González 001; Xavier Martorell; Nacho Navarro; Eduard Ayguadé (SIGMETRICS, 2012)

Energy accounting for shared virtualized environments under DVFS using PMC-based power models. - Ramon Bertran; Yolanda Becerra 001; David Carrera 001; Vicenç Beltran 001; Marc González 001; Xavier Martorell; Nacho Navarro; Jordi Torres; Eduard Ayguadé (Future Gener. Comput. Syst., 2012)

Counter-Based Power Modeling Methods: Top-Down vs. Bottom-Up. - Ramon Bertran; Marc González 001; Xavier Martorell; Nacho Navarro; Eduard Ayguadé (Comput. J., 2013)

Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems. - Ramon Bertran; Yutaka Sugawara; Hans M. Jacobson; Alper Buyuktosunoglu; Pradip Bose (IBM J. Res. Dev., 2013)

A Systematic Methodology to Generate Decomposable and Responsive Power Models for CMPs. - Ramon Bertran; Marc González 001; Xavier Martorell; Nacho Navarro; Eduard Ayguadé (IEEE Trans. Computers, 2013)

Characterization of transient error tolerance for a class of mobile embedded applications. - Liang Wang 055; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose; Kevin Skadron (IISWC, 2014)

Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities. - Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose; Timothy J. Slegel; Gerard Salem; Sean M. Carey; Richard F. Rizzolo; Thomas Strach (MICRO, 2014)

Safe limits on voltage reduction efficiency in GPUs: a direct measurement approach. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Vijay Janapa Reddi (MICRO, 2015)

Robust power management in the IBM z13. - Tobias Webel; Preetham M. Lobo; Ramon Bertran; Gerard Salem; Malcolm Allen-Ware; Richard F. Rizzolo; Sean M. Carey; Thomas Strach; Alper Buyuktosunoglu; Charles Lefurgy; Pradip Bose; Ricardo Nigaglioni; et al. (IBM J. Res. Dev., 2015)

BRAVO: Balanced Reliability-Aware Voltage Optimization. - Karthik Swaminathan; Nandhini Chandramoorthy; Chen-Yong Cher; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose (HPCA, 2017)

Very Low Voltage (VLV) Design. - Ramon Bertran; Pradip Bose; David M. Brooks; Jeff Burns; Alper Buyuktosunoglu; Nandhini Chandramoorthy; Eric Cheng; Martin Cochet; Schuyler Eldridge; Daniel Friedman; Hans M. Jacobson; Rajiv V. Joshi; et al. (ICCD, 2017)

libPRISM: an intelligent adaptation of prefetch and SMT levels. - Cristobal Ortega; Miquel Moretó; Marc Casas; Ramon Bertran; Alper Buyuktosunoglu; Alexandre E. Eichenberger; Pradip Bose (ICS, 2017)

26.2 Power supply noise in a 22nm z13™ microprocessor. - Pierce I-Jen Chuang; Christos Vezyrtzis; Divya Pathak; Richard F. Rizzolo; Tobias Webel; Thomas Strach; Otto A. Torreiter; Preetham Lobo; Alper Buyuktosunoglu; Ramon Bertran; Michael S. Floyd; Malcolm S. Ware; et al. (ISSCC, 2017)

Machine learning techniques for taming the complexity of modern hardware design. - Matthew M. Ziegler; Ramon Bertran Monfort; Alper Buyuktosunoglu; Pradip Bose (IBM J. Res. Dev., 2017)

ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks. - Calvin Bulla; Lluc Alvarez; Miquel Moretó; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose (IISWC, 2018)

Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor. - Christos Vezyrtzis; Thomas Strach; Pierce I-Jen Chuang; Preetham Lobo; Richard F. Rizzolo; Tobias Webel; Pawel Owczarczyk; Alper Buyuktosunoglu; Ramon Bertran; David T. Hui; Susan M. Eickhoff; Michael S. Floyd; et al. (ISSCC, 2018)

IBM POWER9 circuit design and energy optimization for 14-nm technology. - Eric J. Fluhr; Rahul M. Rao; Howard Smith; Alper Buyuktosunoglu; Ramon Bertran Monfort (IBM J. Res. Dev., 2018)

Generation of Stressmarks for Early Stage Soft-Error Modeling. - Karthik Swaminathan; Ramon Bertran; Hans M. Jacobson; Prabhakar Kudva; Pradip Bose (DSN (Supplements), 2019)

Asymmetric Resilience for Accelerator-Rich Systems. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Vijay Janapa Reddi (IEEE Comput. Archit. Lett., 2019)

IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems. - Christopher J. Berry; David Wolpert 001; Christos Vezyrtzis; Richard F. Rizzolo; Sean M. Carey; Yaniv Maroz; Hunter F. Shi; Dureseti Chidambarrao; Christian Jacobi 002; Anthony Saporito; Thomas Strach; Alper Buyuktosunoglu; et al. (IEEE J. Solid State Circuits, 2019)

Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Quan Chen 002; Minyi Guo; Vijay Janapa Reddi (HPCA, 2020)

2.7 IBM z15: A 12-Core 5.2GHz Microprocessor. - Christopher J. Berry; Brian Bell 001; Adam Jatkowski; Jesse Surprise; John Isakson; Ofer Geva; Brian Deskin; Mark Cichanowski; Dina Hamid; Chris Cavitt; Gregory Fredeman; Anthony Saporito; et al. (ISSCC, 2020)

Proactive power management in IBM z15. - Tobias Webel; Preetham M. Lobo; Thomas Strach; Pradeep Bhadravati Parashurama; Srinivas Purushotham; Ramon Bertran; Alper Buyuktosunoglu (IBM J. Res. Dev., 2020)

SERMiner : A Framework for Early-stage Reliability Estimation for IBM Processors. - Karthik Swaminathan; Ramon Bertran; Hans M. Jacobson; Pradip Bose; Matthias Pflanz; Doug Balazich (DSN (Supplements), 2021)

Energy Efficiency Boost in the AI-Infused POWER10 Processor. - Brian W. Thompto; Dung Q. Nguyen; José E. Moreira; Ramon Bertran; Hans M. Jacobson; Richard J. Eickemeyer; Rahul M. Rao; Michael Goulet; Marcy Byers; Christopher J. Gonzalez; Karthik Swaminathan; Nagu R. Dhanwada; et al. (ISCA, 2021)

MicroGrad: A Centralized Framework for Workload Cloning and Stress Testing. - Gokul Subramanian Ravi; Ramon Bertran; Pradip Bose; Mikko H. Lipasti (ISPASS, 2021)

A matrix math facility for Power ISA(TM) processors. - José E. Moreira; Kit Barton; Steven Battle; Peter Bergner; Ramon Bertran; Puneeth Bhat; Pedro Caldeira; David Edelsohn; Gordon C. Fossum; Brad Frey; Nemanja Ivanovic; Chip Kerchner; et al. (CoRR, 2021)

Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15. - David Wolpert 001; Christopher J. Berry; Brian Bell 001; Adam Jatkowski; Jesse Surprise; John Isakson; Ofer Geva; Brian Deskin; Mark Cichanowski; Dina Hamid; Chris Cavitt; Gregory Fredeman; et al. (IEEE J. Solid State Circuits, 2021)

Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption. - Cristobal Ortega; Lluc Alvarez; Marc Casas; Ramon Bertran; Alper Buyuktosunoglu; Alexandre E. Eichenberger; Pradip Bose; Miquel Moretó (IEEE Trans. Computers, 2021)

Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs. - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Yazhou Zu; Vijay Janapa Reddi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Erratum to "Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs". - Jingwen Leng; Alper Buyuktosunoglu; Ramon Bertran; Pradip Bose; Yazhou Zu; Vijay Janapa Reddi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

AI accelerator on IBM telum processor: industrial product. - Cédric Lichtenau; Alper Buyuktosunoglu; Ramon Bertran; Peter Figuli; Christian Jacobi 002; Nikolaos Papandreou; Haris Pozidis; Anthony Saporito; Andrew Sica; Elpida Tzortzatos (ISCA, 2022)

Characterization and Exploration of Latch Checkers for Efficient RAS Protection. - Karthik Swaminathan; Ramon Bertran; Doug Balazich; Alper Buyuktosunoglu; Arvind Haran; Sean M. Carey; Karl Anderson; Hans M. Jacobson; Matthias Pflanz; Pradip Bose (DSN-S, 2023)

Adaptive Power Shifting for Power-Constrained Heterogeneous Systems. - Cristobal Ortega; Lluc Alvarez; Alper Buyuktosunoglu; Ramon Bertran; Todd Rosedahl; Pradip Bose; Miquel Moretó (IEEE Trans. Computers, 2023)

FitBit: Ensuring Robust and Secure Execution Through Runtime-Generated Stressmarks. - Karthik Swaminathan; Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose (HOST, 2024)

8.1 Dynamic Guard-Band Features of the IBM zNext System. - Tobias Webel; Phillip J. Restle; Ramon Bertran; Alper Buyuktosunoglu; Sean M. Carey; Alejandro Cook; Karl Anderson; Michael Romain; Thomas Strach; Pradeep Bhadravati Parashurama; Aishwarya Tadkase; Rahman Abber Tahir; et al. (ISSCC, 2025)