CEDA: Control-flow Error Detection through Assertions. - Ramtilak Vemu; Jacob A. Abraham (IOLTS, 2006)

Automatic Generation of Instructions to Robustly Test Delay Defects in Processors. - Sankar Gurumurthy; Ramtilak Vemu; Jacob A. Abraham; Daniel G. Saab (ETS, 2007)

ACCE: Automatic correction of control-flow errors. - Ramtilak Vemu; Sankar Gurumurthy; Jacob A. Abraham (ITC, 2007)

A low-cost concurrent error detection technique for processor control logic. - Ramtilak Vemu; Abhijit Jas; Jacob A. Abraham; Srinivas Patil; Rajesh Galivanche (DATE, 2008)

On efficient generation of instruction sequences to test for delay defects in a processor. - Sankar Gurumurthy; Ramtilak Vemu; Jacob A. Abraham; Suriyaprakash Natarajan (ACM Great Lakes Symposium on VLSI, 2008)

Budget-Dependent Control-Flow Error Detection. - Ramtilak Vemu; Jacob A. Abraham (IOLTS, 2008)

Functionally valid gate-level peak power estimation for processors. - Sriram Sambamurthy; Sankar Gurumurthy; Ramtilak Vemu; Jacob A. Abraham (ISQED, 2009)

CEDA: Control-Flow Error Detection Using Assertions. - Ramtilak Vemu; Jacob A. Abraham (IEEE Trans. Computers, 2011)