Synthesis of CMOS Analog Cells Using AMIGO. - Ramy Iskander; Mohamed Dessouky; Maie Aly; Mahmoud Magdy; Noha Hassan; Noha Soliman; Sami Moussa (DATE, 2003)

Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing. - Ramy Iskander; Marie-Minerve Louërat; Andreas Kaiser (ICECS, 2007)

Connaissance et synthèse en vue de la conception et la réutilisation de circuits analogiques intégrés. (Knowledge-aware synthesis for analog integrated circuit design and reuse). - Ramy Iskander (2008)

Simulation-based hierarchical sizing and biasing of analog firm IPs. - Farakh Javid; Ramy Iskander; Marie-Minerve Louërat (BMAS, 2009)

Design and modeling of a successive approximation ADC for the electrostatic harvester of vibration energy. - Raouf Khalil; Andrii Dudka; Dimitri Galayko; Ramy Iskander; Philippe Basset (BMAS, 2010)

Automatic stress effects computation based on a layout generation tool for analog IC. - Stephanie Youssef; Damien Dupuis; Ramy Iskander; Marie-Minerve Louërat (BMAS, 2010)

A seamless representation for coupling transistor sizing with nanometric CMOS layout generation. - Stephanie Youssef; Farakh Javid; Damien Dupuis; Ramy Iskander; Marie-Minerve Louërat (ECCTD, 2011)

A Python-based layout-aware analog design methodology for nanometric technologies. - Stephanie Youssef; Farakh Javid; Damien Dupuis; Ramy Iskander; Marie-Minerve Louërat (IDT, 2011)

A unified platform for design and verification of mixed-signal systems based on SystemC AMS. - Yao Li 009; Ramy Iskander; Farakh Javid; Marie-Minerve Louërat (FDL, 2012)

A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS. - Yao Li 009; Ramy Iskander; Farakh Javid; Marie-Minerve Louërat (FDL (Selected Papers), 2012)

A structured DC analysis methodology for accurate verification of analog circuits. - Farakh Javid; Ramy Iskander; Marie-Minerve Louërat; François Durbin (ISCAS, 2013)

Hierarchical sizing and biasing of analog firm intellectual properties. - Ramy Iskander; Marie-Minerve Louërat; Andreas Kaiser (Integr., 2013)

Modeling, design and verification platform using SystemC AMS. - Yao Li 009; Ramy Iskander; Marie-Minerve Louërat (ISQED, 2014)

Substrate noise modeling with dedicated CAD framework for smart power ICs. - Hao Zou 002; Yasser Moursy; Ramy Iskander; Camillo Stefanucci; Pietro Buccella; Maher Kayal; Jean-Michel Sallese (ISCAS, 2015)

Fast multidimensional optimization of analog circuits initiated by monodimensional global Peano explorations. - Akram Malak; Yao Li 009; Ramy Iskander; François Durbin; Farakh Javid; Jean-Marc Guebhard; Marie-Minerve Louërat; André Tissot (Integr., 2015)

Towards automatic diagnosis of minority carriers propagation problems in HV/HT automotive smart power ICs. - Yasser Moursy; Hao Zou 002; Ramy Iskander; Pierre Tisserand; Dieu-My Ton; Giuseppe Pasetti; Ehrenfried Seebacher; Alexander Steinmair; Thomas Gneiting; Heidrun Alius (DATE, 2016)

Mixed-signal PI controller in current-mode DC-DC buck converter for automotive applications. - Yasser Moursy; Raouf Khalil; Sergio Lecce; Vanni Poletto; Ramy Iskander; Marie-Minerve Louërat (ISCAS, 2016)

An adaptive mesh refinement strategy of substrate modeling for smart power ICs. - Hao Zou 002; Yasser Moursy; Ramy Iskander; Jean-Paul Chaput; Marie-Minerve Louërat (ISCAS, 2016)

Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs. - Pietro Buccella; Camillo Stefanucci; Hao Zou 002; Yasser Moursy; Ramy Iskander; Jean-Michel Sallese; Maher Kayal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Using CAD Tool for Substrate Parasitic Modeling in Smart Power Technology. - Hao Zou 002; Yasser Moursy; Ramy Iskander; Alexander Steinmair; Heimo Gensinger; Ehrenfried Seebacher; Jean-Paul Chaput; Marie-Minerve Louërat (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Fast extraction of predictive models for integrated circuits using n-performance Pareto fronts. - Adil Brik; Lioua Labrak; Laurent Carrel; Ian O'Connor; Ramy Iskander (VLSI-SoC, 2019)