A Third-Order 9-Bit 10-MHz CMOS Delta Sigma Modulator With One Active Stage. - Ramy Yousry; Emad Hegazi; Hani Fikry Ragai (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Power Optimized ADC-Based Serial Link Receiver. - E-Hung Chen; Ramy Yousry; Chih-Kong Ken Yang (IEEE J. Solid State Circuits, 2012)

A digitally-calibrated 10GS/s reconfigurable flash ADC in 65-nm CMOS. - Ramy Yousry; Henry Park; E-Hung Chen; Chih-Kong Ken Yang (ISCAS, 2013)

A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET Technology. - Tamer A. Ali 001; Ramy Yousry; Henry Park; Ehung Chen; Po-Shuan Weng; Yi-Chieh Huang; Chun-Cheng Liu; Chien-Hua Wu; Shih-Hao Huang; Chungshi Lin; Ke-Chung Wu; Kun-Hung Tsai; et al. (ISSCC, 2019)

6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology. - Tamer A. Ali 001; Ehung Chen; Henry Park; Ramy Yousry; Yu-Ming Ying; Mohammed Abdullatif; Miguel Gandara; Chun-Cheng Liu; Po-Shuan Weng; Huan-Sheng Chen; Mohammad Elbadry; Qaiser Nehal; et al. (ISSCC, 2020)

11.1 A 1.7pJ/b 112Gb/s XSR Transceiver for Intra-Package Communication in 7nm FinFET Technology. - Ramy Yousry; Ehung Chen; Yu-Ming Ying; Mohammed Abdullatif; Mohammad Elbadry; Ahmed ElShater; Tsz-Bin Liu; Joonyeong Lee; Dhinessh Ramachandran; Kaiz Wang; Chih-Hao Weng; Mau-Lin Wu; et al. (ISSCC, 2021)