Static Compaction Techniques to Control Scan Vector Power Dissipation. - Ranganathan Sankaralingam; Rama Rao Oruganti; Nur A. Touba (VTS, 2000)

Reducing Power Dissipation during Test Using Scan Chain Disable. - Ranganathan Sankaralingam; Nur A. Touba; Bahram Pouya (VTS, 2001)

Reducing Test Power During Test Using Programmable Scan Chain Disable. - Ranganathan Sankaralingam; Nur A. Touba (DELTA, 2002)

Inserting Test Points to Control Peak Power During Scan Testing. - Ranganathan Sankaralingam; Nur A. Touba (DFT, 2002)

Controlling Peak Power During Scan Testing. - Ranganathan Sankaralingam; Nur A. Touba (VTS, 2002)

A fast and highly accurate path delay emulation framework for logic-emulation of timing speculation. - Shuou Nomura; Karthikeyan Sankaralingam; Ranganathan Sankaralingam (ITC, 2010)